SpritesMind.Net

I've been always wonder, why arbiter uses ZA[0], now I know why. Yes, it also seemed the most logical to me that ZA0 is connected to /UDS by the bus arbiter on 68k access to Z80 bus, my theory did not contradict that. The question was more to know if the I/O chip uses ZA0 to know which byte (VD15-V...

That's weird because I found a test ROM made by Mask of Destiny (see this post ) which actually tests word writes from 68k to Z80 RAM and it actually verifies the opposite (it writes $BEEF to $A00002 then expect $BE to be read from $A00002 as byte, while $A00003 retains previous value). You could th...

From gen-hw.txt Word-wide writes When doing word-wide writes to Z80 RAM, only the MSB is written, and the LSB is ignored: 0000: AA BB CC DD ; Z80 memory move.w #$1234, $A00000 ; do a word-wide write 0000: 12 BB CC DD ; result Word-wide reads A word-wide read from Z80 RAM has the LSB of the data dupl...

Couldn't you simply try to detect the presence of extended RAM ?

See this thread: viewtopic.php?f=2&t=2460&p=32814&hilit=firecore#p32814

You can also find an implementation of DIVU/DIVS timings here: http://pasti.fxatari.com/68kdocs/ Also, if you are not already aware, there are also some timings errors in M68K User Manual that are corrected in YACHT.txt document: http://nemesis.hacking-cult.org/MegaDrive/Documentation/Yacht.txt I re...

You are welcome. Gens and Picodrive sourcecode were also quite helpful to me when I was trying to figure some of these things or clarify some stuff so I am glad this can be helpful to others in return. That's also why I always try to comment the code as much as possible and indicate stuff that were ...

I already told you (I think at least) but when this was written, there were barely any documentation about CDD and it was implemented to be mostly optimized while still working fine with all existing BIOS / game software. CDD emulation code is therefore definitively not accurate to how the real micr...

And reading STAT3 will clear the pending status bit, but won't actually suppress an interrupt that was queued to trigger later? Well, that is likely incorrect in my code actually (you can see there is commented code which clear the pending int5 flag when !DECI is set and CDC irq line is disactivate...

how does the BIOS get correct TOC information if the lead-in area hasn't already been read in? I would think you'd have to wait N milliseconds for the drive head to seek to the beginning of the disc, plus two more seconds after starting the disc reading before you could query TOC information via 0x...

:P Genesis Plus GX seems to start in the "reading TOC" (0x9) mode when the system is reset and a disc is inserted. The BIOS then sends a "stop" (0x1) command, which GX lets the BIOS read back once, and then it switches to "reading TOC" mode again. This was based on the status infos described in Stef...

hopefully some helpful stuff towards Sega CD emulation. That's a great release, with a lot of interesting manuals but there does not seem to be any unknown Genesis or Sega CD hardware documentation in there (I can not tell for Saturn emulation though). It adds a few Genesis / Sega CD Technical Bull...

And it raises another question: should the subchannels be stored in the deinterleaved or in the interleaved form? They are interleaved on the CD itself and certain drives are able to output the raw interleaved subs in certain modes. For the record, Mega-CD gate-array stores subcode data in raw (int...

I agree, and I'm all for supporting a full image format with leadin/leadout sectors if that's ever possible to get these dumped more accurately than current TOC infos reported in cue/ccd/toc/etc files if concerned people ends up with one that is 'perfect' enough for everybody. Personally, I also hav...

So then as I presume the Mega CD BIOS expects to be able to read the raw TOC data, No, it doesn't. BIOS only reads the TOC data through CDD command/status. Q channel raw data is decoded by CD DSP chip and sent to CDD micro-controller (through SUBQ signal) which extracts the TOC infos from it while ...

There are a few interesting defines iib that file, to improve CDD emulation accuracy. ;;various timeout values IRQTIMEOUT EQU 2 ;number of ms before HSCK required after IRQ HSCKTIMEOUT EQU 3 ;number of ms to complete status/command sequence H2ITIMEOUT EQU 3 ;number of ms to wait for handshake from t...