Search found 864 matches
- Thu Jul 23, 2020 8:18 pm
- Forum: Sound
- Topic: Sega CD Mode 1 support functions for SGDK
- Replies: 25
- Views: 12006
Re: Sega CD Mode 1 support functions for SGDK
It is suppose to work with Genesis plus gx, but i can not find any guide for that, so any help is welcome Sorry, I didn't see this post earlier but it's indeed not well documented. It's quite simple to activate Mega CD mode 1 though (I call it "cartridge boot" mode): just put the cue file and assoc...
- Tue Jul 21, 2020 10:48 am
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 24
- Views: 6743
Re: mcd-verificator (CD core accuracy tests)
I don't think the problem with MCD emulation on flashcarts with 32x is caused by /DTACK since /DTACK is asserted by the console itself when accessing Mega CD registers (in 0xA120xx range). I believe the problem is due to 32X not connecting all address lines to cartridge, which makes it impossible to...
- Tue Jul 14, 2020 4:50 pm
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 24
- Views: 6743
Re: mcd-verificator (CD core accuracy tests)
@KRIKzz: I have a question regarding a specific test in CDC section (see code below in test_std.c) //check cdc registers increment mcdWR16(0xff8004, 0x0001); for (i = 1; i < 32 + 8; i++) { val = mcdRD8(0xff8005) & 0x1F; if (i < 32) { if (val != i)return 0x08; //address should increment up to 31 (inc...
- Thu Jul 02, 2020 12:09 pm
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 24
- Views: 6743
Re: mcd-verificator (CD core accuracy tests)
My bad, I forgot checksum was only the last nibble (RS9). Now I wonder why RS8 bit 2 is set only for 3 frames while reading TOC (RS0=0×9) ? It apparently still returns disc flags even when reporting 'not ready' status (RS1=0xF) and, according to C-Trac sourcecode, bit 2 indicates the current sector ...
- Thu Jul 02, 2020 6:42 am
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 24
- Views: 6743
Re: mcd-verificator (CD core accuracy tests)
Thank your for this and for publishing your source and notes, this could indeed be quite useful to figure some undocumented stuff and improve Mega CD emulation accuracy overall. The CDD status/command logs from real hardware are also very helpful to figure the timings of the various commands and ass...
- Mon Dec 30, 2019 8:38 am
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 25
- Views: 10189
Re: M68K Bus Control and Vdp
I've been always wonder, why arbiter uses ZA[0], now I know why. Yes, it also seemed the most logical to me that ZA0 is connected to /UDS by the bus arbiter on 68k access to Z80 bus, my theory did not contradict that. The question was more to know if the I/O chip uses ZA0 to know which byte (VD15-V...
- Sat Dec 21, 2019 4:42 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 25
- Views: 10189
Re: M68K Bus Control and Vdp
That's weird because I found a test ROM made by Mask of Destiny (see this post ) which actually tests word writes from 68k to Z80 RAM and it actually verifies the opposite (it writes $BEEF to $A00002 then expect $BE to be read from $A00002 as byte, while $A00003 retains previous value). You could th...
- Thu Dec 19, 2019 7:26 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 25
- Views: 10189
Re: M68K Bus Control and Vdp
From gen-hw.txt Word-wide writes When doing word-wide writes to Z80 RAM, only the MSB is written, and the LSB is ignored: 0000: AA BB CC DD ; Z80 memory move.w #$1234, $A00000 ; do a word-wide write 0000: 12 BB CC DD ; result Word-wide reads A word-wide read from Z80 RAM has the LSB of the data dupl...
- Thu Jun 13, 2019 5:32 am
- Forum: Megadrive/Genesis
- Topic: DETECTING RedKid2500-based consoles
- Replies: 9
- Views: 5819
Re: DETECTING RedKid2500-based consoles
Couldn't you simply try to detect the presence of extended RAM ?
See this thread: viewtopic.php?f=2&t=2460&p=32814&hilit=firecore#p32814
See this thread: viewtopic.php?f=2&t=2460&p=32814&hilit=firecore#p32814
- Wed Jun 05, 2019 6:39 pm
- Forum: Megadrive/Genesis
- Topic: 68K cycle timing test ROM?
- Replies: 10
- Views: 6304
Re: 68K cycle timing test ROM?
You can also find an implementation of DIVU/DIVS timings here: http://pasti.fxatari.com/68kdocs/ Also, if you are not already aware, there are also some timings errors in M68K User Manual that are corrected in YACHT.txt document: http://nemesis.hacking-cult.org/MegaDrive/Documentation/Yacht.txt I re...
- Mon Jun 03, 2019 6:30 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 114
- Views: 42764
Re: Questions on writing a new Mega CD emulator
You are welcome. Gens and Picodrive sourcecode were also quite helpful to me when I was trying to figure some of these things or clarify some stuff so I am glad this can be helpful to others in return. That's also why I always try to comment the code as much as possible and indicate stuff that were ...
- Sun Jun 02, 2019 12:41 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 114
- Views: 42764
Re: Questions on writing a new Mega CD emulator
I already told you (I think at least) but when this was written, there were barely any documentation about CDD and it was implemented to be mostly optimized while still working fine with all existing BIOS / game software. CDD emulation code is therefore definitively not accurate to how the real micr...
- Wed May 22, 2019 9:02 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 114
- Views: 42764
Re: Questions on writing a new Mega CD emulator
And reading STAT3 will clear the pending status bit, but won't actually suppress an interrupt that was queued to trigger later? Well, that is likely incorrect in my code actually (you can see there is commented code which clear the pending int5 flag when !DECI is set and CDC irq line is disactivate...
- Wed May 22, 2019 9:38 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 114
- Views: 42764
Re: Questions on writing a new Mega CD emulator
how does the BIOS get correct TOC information if the lead-in area hasn't already been read in? I would think you'd have to wait N milliseconds for the drive head to seek to the beginning of the disc, plus two more seconds after starting the disc reading before you could query TOC information via 0x...
- Tue May 21, 2019 11:52 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 114
- Views: 42764
Re: Questions on writing a new Mega CD emulator
:P Genesis Plus GX seems to start in the "reading TOC" (0x9) mode when the system is reset and a disc is inserted. The BIOS then sends a "stop" (0x1) command, which GX lets the BIOS read back once, and then it switches to "reading TOC" mode again. This was based on the status infos described in Stef...