Surprise surprise, I was wrong. I thought I remembered them being 24 units/layers deep, and they are, but they're broken up to two groups of 12, with logic in between and at the beginning and the end. I don't have time right now to fully transcribe it, but given the other findings here, it seems reasonable that this allows a write to be made to the end or the middle. This would take more control logic, since at any given time there's two different operator's values which could be updated, but it's not that bad because the two values that could be updated would be subsequent operators in the same voice (e.g. voice 5 operator 3 is in the middle and operator 2 is at the end).jotego wrote: ↑Thu Nov 22, 2018 12:35 pmMy implementation -so far as v0.61 of JT12- was assuming that a 24 CSR (circular shift register) only had an update point, so it would take 24 FM ticks to get new data in. That also made sense in view of the length of the BUSY counter, which Sauraen had reported to count for 32 FM ticks. However, the evidence from Kabuto and from YM3438 document tells us that the CSR can be updated in just 12 FM ticks. Thinking of different ways to accomplish this on silicon, I think that an update point just in the middle of it is economical and makes sense if they were reusing layout work from YM2203. As I explained before. Now, if someone looks at the die shots (YM3438 or YM2612) and checks the CSR and outputs from each flip flop just go straight to the next FF's input without any mux anywhere, then we will have to consider other implementation options.
The voice-level circular shift registers are 5-6 units/layers deep as expected. If I remember correctly for the YM2612, the register holding the DAC (PCM) value should update immediately (as soon as the data is in the internal data register), it just only gets used once per complete FM cycle (unless you have the DAC Loud bit turned on).