How sonic 3 save feature works?

For hardware talk only (please avoid ROM dumper stuff)
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eteream
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How sonic 3 save feature works?

Post by eteream » Tue Mar 23, 2010 11:11 pm

If I do not go wrong, normally, games take advantage of the 2 higher megabytes for saving feature. This is how does it work in sonic 3?

Is it a serial or parallel memory? (I have read both!)

But then, how does it work when connected to the Knuckles cartridge? Knuckles cart maps sonic 3 to 2-4MB space but, does it change how save feature work too?

(i'm not interested in ramtron technology but how the logic works)

Thanks in advance!
Last edited by eteream on Wed Mar 24, 2010 12:13 am, edited 2 times in total.

Chilly Willy
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Post by Chilly Willy » Tue Mar 23, 2010 11:35 pm

Set bit 0 of 0xA130F1 to enable the sram, clear bit 0 to enable the rom.

eteream
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Post by eteream » Wed Mar 24, 2010 12:08 am

That works with and without Sonic & Knuckles cart?

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Post by Chilly Willy » Wed Mar 24, 2010 12:52 am

That's how nearly all carts with sram work. It's with or without S&K as well.

Sonic 3 just writes 1 to 0xA130F1 at the start and never does anything else since it's only 2MB. S&K writes 1 before accessing sram and immediately writes 0 afterward.

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Post by eteream » Sat Mar 27, 2010 8:42 pm

OK, thanks! May be timing is different bcose I put another rom into a sonic 3 board and don't work. the other rom has a common parallel save feature.

I discovered how to desolder in the easy way, so I can make some tests.

And may be I will try to make a Sonic & Knuckles 3 in one cart only...

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Post by Chilly Willy » Sat Mar 27, 2010 11:42 pm

Which game was it? Some games use their own custom hardware rather than SEGA's "standard".

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Post by TmEE co.(TM) » Sun Mar 28, 2010 10:47 am

Sonic3 has a bit more going on in the save memory management hardware... The memory is only enabled when the access is in the first 1KB (A9 is tied into the chip enable logic), most games use 8KB, 16KB or maybe even 32KB memories, and they want to see all the memory at once which they won't be able to in Sonic3 cart. The FeRAM is 4KBytes in size in sonic3, but only first KByte is seen.
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Post by Chilly Willy » Sun Mar 28, 2010 5:14 pm

Yeah, also, while most games access the sram at 0x200000, some don't. It's not required, but became sort of a defacto standard. Sonic 3 is at 0x200000.

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Post by TmEE co.(TM) » Sun Mar 28, 2010 7:16 pm

Its at $200000 because most ROMs were never over 2Mbytes and you only needed single quad NAND chip to handle address decoding.
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Post by Chilly Willy » Sun Mar 28, 2010 7:55 pm

TmEE co.(TM) wrote:Its at $200000 because most ROMs were never over 2Mbytes and you only needed single quad NAND chip to handle address decoding.
Yep! The largest power of two needs the least decoding, and for the 4MB rom space, that would be 2 MB. That's why larger roms use the write 1 to $A130F1 trick - just latch that with a single flip-flop and AND it with that single address line to make the new sram select.

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Post by eteream » Tue Mar 30, 2010 5:10 pm

Where resides the hardware to change the logic of the 2-4MB area, on the machine or in the cart board? For a common model...

I mean, where is located physically register 0xA130F1 in the MD or in the cartridge?
Chilly Willy wrote:Which game was it? Some games use their own custom hardware rather than SEGA's "standard".
A patched version of Megaman.

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Post by TmEE co.(TM) » Tue Mar 30, 2010 5:33 pm

eteream wrote:Where resides the hardware to change the logic of the 2-4MB area, on the machine or in the cart board? For a common model...

I mean, where is located physically register 0xA130F1 in the MD or in the cartridge?
There is one strobe on cartslot (pin B31) which is pulsed when $A130xx area is accessed, with that pulse, the first bit of the databus is latched into the flipflop. Flipflop output controls a simple address decoder. All saves realted stuff is on the cart, there's nothing in MD.
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Post by Chilly Willy » Tue Mar 30, 2010 6:21 pm

TmEE co.(TM) wrote:
eteream wrote:Where resides the hardware to change the logic of the 2-4MB area, on the machine or in the cart board? For a common model...

I mean, where is located physically register 0xA130F1 in the MD or in the cartridge?
There is one strobe on cartslot (pin B31) which is pulsed when $A130xx area is accessed, with that pulse, the first bit of the databus is latched into the flipflop. Flipflop output controls a simple address decoder. All saves realted stuff is on the cart, there's nothing in MD.
What he said. While the "official" address is $A130F1, most folks probably don't match the exact address - like with S3, they just look for the strobe since that one "register" is the only one they care about... the only one written inside the game.

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Post by HardWareMan » Wed Mar 31, 2010 4:48 am

Chilly Willy wrote:
TmEE co.(TM) wrote:
eteream wrote:Where resides the hardware to change the logic of the 2-4MB area, on the machine or in the cart board? For a common model...

I mean, where is located physically register 0xA130F1 in the MD or in the cartridge?
There is one strobe on cartslot (pin B31) which is pulsed when $A130xx area is accessed, with that pulse, the first bit of the databus is latched into the flipflop. Flipflop output controls a simple address decoder. All saves realted stuff is on the cart, there's nothing in MD.
What he said. While the "official" address is $A130F1, most folks probably don't match the exact address - like with S3, they just look for the strobe since that one "register" is the only one they care about... the only one written inside the game.
Yeah. It is all about simplicity of hardware. And in the case of hardware, simpler means cheaper. Genesis (or Megadrive) has own address decoder, and for addresses range of $A13000..$A130FF it generate chip select strobe at B31 pin of cartrige slot. And don't forget development DRAM cartrige (wich mentioned in Segatech document), wich use same B31 strobe (marked as !TIME signal on famous schematics) for block write to ROM area and other functions. I think, exact address $A130F1 was selected for compatibility with that DRAM development cartrige.

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Post by eteream » Wed Mar 31, 2010 3:45 pm

OK I understand. Thanks!

Some time ago I read a paper of saturn or segaCD (I don't remember) where it said how to do things like this, where there are several solutions for a case between hardware and software. The idea was to be backwards compatible. Doing things only in one way you can save, either on a emulation or/and hardware solution when you make the new generation console or any other future solution (so you can save code/"cpu speed" and/or hardware).

Also, it helps testing (NTSC->PAL, new revision, ...) with automated detections/procedures.


UPDATE:
I put a ROM with the same saving code into a "J League Pro Striker Perfect Edition" board and works perfect.
This board also uses a RAMTRON chip but only has a unique multiplexer (m74ch00b1 like chip), so I guess there is something more on a Sonic 3 board.

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