Sega Genesis Game Cartridge PCB with dual DIP32 8-Bit Mask ROM's

[siudym]

I once heard that some Sega Genesis/MD cartridges used two 8-Bit chips (2x 32pin DIP ROM) instead of 16-bit ROMs - I think those were Electronic Arts games. Is that true? If so, what game titles use such PCBs?

[HardWareMan]

Some games uses 8bit ROM and 74x373 as data bit extender (it keep high byte while low goes directly from ROM itself). CAS2 pin required.

[siudym]

Are there any known game titles that have such PCBs?

[SONIC3D]

Are there any known game titles that have such PCBs?

Super Skidmarks is one of them.

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[Mask of Destiny]

DIP-42 seems like an awfully big package for an 8-bit mask ROM. You sure all that logic isn't just for the J-Cart stuff?

The only cart I've come across with actual 8-bit mask ROM is F-22 Interceptor, but this cart used a normal 16-bit mask ROM for the part with the code and just used 8-bit accesses for the other part. The one cart I have that's sort of similar to what's described here is my copy of Turrican. It seems they accidentally had the mask ROMs manufactured byteswapped and then worked around it in hardware

[SONIC3D]

DIP-42 seems like an awfully big package for an 8-bit mask ROM. You sure all that logic isn't just for the J-Cart stuff?

The only cart I've come across with actual 8-bit mask ROM is F-22 Interceptor, but this cart used a normal 16-bit mask ROM for the part with the code and just used 8-bit accesses for the other part. The one cart I have that's sort of similar to what's described here is my copy of Turrican. It seems they accidentally had the mask ROMs manufactured byteswapped and then worked around it in hardware

Yes, 100% sure.

The Left most 74244 and the 74244 next to the PLD right side is for J-Cart joyport buffer.

The ROM pinout compatible to M27C160.
Pin 32 tied to GND, so it's byte mode.
Pin 10 connected to PLD.Pin19/74374.Clk, so this maybe the even/odd of the original ROM.
Pin 30 tied to A20.(This means if you want to replace with M27C160, the ROM data should be interleaved, as pin 30 is even/odd pin of M27C160.)
Pin 15/17/19/21/24/26/28 are N.C.
Pin 14/16/18/20/23/25/27/29(ROM D0..7) are connected to the input pins of 74374 and the right most 74244.(They are not connect directly to cartridge bus.)

For PLD chip:
Pin3 is input with CAS2 from cartridge slot.
Pin 12 output to 74374./OE and right most 74244./OE
Pin 19 output to 74374.Clk and ROM.A0(ROM Pin 10)
The rest pin is similar to other J-Cart PLD.(Unlike Sampras tennis, this PLD not using Cartridge A23 for J-Cart I/O checking. Using /CE_0 with A22..19 is enough.)


The right most 74244 it's the buffer for low 8bit data, output pins connect to cartridge bus D0..7.
The 74374 is the latch for high 8bit data, output pins connect to cartridge bus D8..15.

[Mask of Destiny]

The ROM pinout compatible to M27C160.
Pin 32 tied to GND, so it's byte mode.
Pin 10 connected to PLD.Pin19/74374.Clk, so this maybe the even/odd of the original ROM.
Pin 30 tied to A20.(This means if you want to replace with M27C160, the ROM data should be interleaved, as pin 30 is even/odd pin of M27C160.)
Pin 15/17/19/21/24/26/28 are N.C.
Pin 14/16/18/20/23/25/27/29(ROM D0..7) are connected to the input pins of 74374 and the right most 74244.(They are not connect directly to cartridge bus.)

For PLD chip:
Pin3 is input with CAS2 from cartridge slot.
Pin 12 output to 74374./OE and right most 74244./OE
Pin 19 output to 74374.Clk and ROM.A0(ROM Pin 10)
The rest pin is similar to other J-Cart PLD.(Unlike Sampras tennis, this PLD not using Cartridge A23 for J-Cart I/O checking. Using /CE_0 with A22..19 is enough.)


The right most 74244 it's the buffer for low 8bit data, output pins connect to cartridge bus D0..7.
The 74374 is the latch for high 8bit data, output pins connect to cartridge bus D8..15.

Ah, so it is a 16-bit ROM chip, but they're running it in 8-bit mode for some bizarre reason. I guess they screwed up their mask ROM too like Turrican.

Speaking of Turrican, I misremembered exactly the mistake they made. It wasn't that they swapped odd and even. That's easy enough to fix with some board routing, but I think what they did is they accidentally appended the odd bytes to the even bytes rather than interleaving

[SONIC3D]

Ah, so it is a 16-bit ROM chip, but they're running it in 8-bit mode for some bizarre reason. I guess they screwed up their mask ROM too like Turrican.

Speaking of Turrican, I misremembered exactly the mistake they made. It wasn't that they swapped odd and even. That's easy enough to fix with some board routing, but I think what they did is they accidentally appended the odd bytes to the even bytes rather than interleaving

Maybe they made the mistake in the maskrom production. But I guess there is also another possible reason that maybe the factory production fee of 2MBytes ROM in 16-bit data mode is higher than 8-bit mode. Or the 16-bit production line in factory is filled with other orders. So even the cost of 2 more chips(74374 and 74244) is added, they decide to accept it(74374 is not cheap as registers involved).