Vdp Timings
Posted: Thu Dec 08, 2022 9:11 pm
I would like to know if exist a documentation describing when vdp registers are taked in account during the rendering line process (line cycle or slot).
For example, if horizontal scroll register is taked in account at x cycle / slot x so modifying register after this time has no effect on the current line.
Reading the forum i understand that the vdp have a pixel buffer (16 pixel width / 1 column)? So it means that the vdp render the column anf fill the buffer one column before the effective pixel are outputed to the screen?
Thanks for your help.
For example, if horizontal scroll register is taked in account at x cycle / slot x so modifying register after this time has no effect on the current line.
Reading the forum i understand that the vdp have a pixel buffer (16 pixel width / 1 column)? So it means that the vdp render the column anf fill the buffer one column before the effective pixel are outputed to the screen?
Thanks for your help.