Page 1 of 1
silly question: z80 and 68k cycles.
Posted: Thu Feb 06, 2014 2:28 am
by sigflup
Does accessing the 68K bank from the Z80 take away 68K cycles?
Posted: Thu Feb 06, 2014 2:43 am
by Mask of Destiny
Yep. I did some logic analyzer captures a while back to figure out the typical number of wait states on the Z80 side for such an access. I also captured some of the 68K bus signals to better understand what was happening, so I should be able to produce an estimate of the number of cycles lost if you like.
I also suspect that accessing $7F00 region (to access the PSG for instance) also involves requesting the 68K's bus, but I haven't gotten around to testing that yet.
Posted: Thu Feb 06, 2014 2:45 am
by sigflup
THANK YOU SO MUCH FOR YOUR WORK!!
Posted: Thu Feb 06, 2014 6:37 am
by Mask of Destiny
Based on a quick look at one of my captures, it looks like something in the neighborhood of 9-11 68K cycles is typical. If you're doing a word-wide access from the Z80 the second byte will typically result in a slightly longer delay on the 68K side. This is not surprising given that the request takes longer on the Z80 side as well.
Posted: Thu Feb 06, 2014 9:16 am
by TmEE co.(TM)
PSG access goes on the 68K bus aswell, so if you are doing DMA avoidance or such on Z80 side and happen to touch PSG you'll be frozen in place.
Posted: Thu Feb 06, 2014 9:36 am
by sigflup
wait wait. I'm having a hard time understanding that last statement. dma avoidance on the z80 side? Like detecting a transfer on the z80?
Posted: Thu Feb 06, 2014 9:41 am
by TmEE co.(TM)
When DMA is in progress and Z80 makes a ROM (or PSG or VDP) access it will be frozen until DMA ends. This is also one of the reasons PCM sound sucks in MD games.
Posted: Thu Feb 06, 2014 9:43 am
by sigflup
ahh.. thank you