Another question, really dumb this one :
if I understood correctly :
* horizontal scrolling can be specified for a whole plane, or line (1 pixel height) per line, or cell (8 pixels height) per cell. So I assume it uses 2 planes * 2 bytes (case of whole plane), up to 2*1024*2 bytes (case of per line scroll, with max height of a plane = 128 tiles = 1024 lines?) in VRAM
* vertical scroll is similar, except you can only choose between full plane scroll and 2 cells scroll (= 16 pixels ?). That should use 2*64*2 bytes (max plane width = 128 tiles = 64 cells ?) in VSRAM
But the HSCROLL table seems to be 1024 bytes long and the VSRAM would be 80 bytes. So I misunderstood at least one thing...
Unless you specify only the scroll values for the lines and columns that are actually displayed (so 320 lines max and 240 columns, so 15 cells of 16 pixels ?). But numbers don't match either...
Another thing I don't understand : why is there a separate VSRAM and not a HSRAM ? Since the HSCROLL table is larger, it would have made more sense ?