Code: Select all
read_sram:
move.w #0x2700,sr /* disable ints */
moveq #0,d1
moveq #0,d0
move.w 0xA15122,d0 /* COMM2 holds offset */
lea 0x200000,a0
move.b #1,0xA15107 /* set RV */
move.b #3,0xA130F1 /* SRAM enabled, write protected */
move.b 1(a0,d0.l),d1 /* read SRAM */
move.b #2,0xA130F1 /* SRAM disabled, write protected */
move.b #0,0xA15107 /* clear RV */
move.w d1,0xA15122 /* COMM2 holds return byte */
move.w #0,0xA15120 /* done */
move.w #0x2000,sr /* enable ints */
bra main_loop
write_sram:
move.w #0x2700,sr /* disable ints */
moveq #0,d1
move.w 0xA15122,d1 /* COMM2 holds offset */
lea 0x200000,a0
move.b #1,0xA15107 /* set RV */
move.b #1,0xA130F1 /* SRAM enabled, write enabled */
move.b d0,1(a0,d1.l) /* write SRAM */
move.b #2,0xA130F1 /* SRAM disabled, write protected */
move.b #0,0xA15107 /* clear RV */
move.w #0,0xA15120 /* done */
move.w #0x2000,sr /* enable ints */
bra main_loop