mcd-verificator (CD core accuracy tests)

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KRIKzz
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mcd-verificator (CD core accuracy tests)

Post by KRIKzz » Wed Jul 01, 2020 12:13 am

During cd core development i spent lot of time on figuring out how mega-cd actually works, some of my conclusions reflected in mcd-verificator diagnostics tool. I share it with hope that it will help to make better CD emulators (:

https://github.com/krikzz/MEGA-PRO/tree ... erificator

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Re: mcd-verificator (CD core accuracy tests)

Post by Eke » Thu Jul 02, 2020 6:42 am

Thank your for this and for publishing your source and notes, this could indeed be quite useful to figure some undocumented stuff and improve Mega CD emulation accuracy overall.

The CDD status/command logs from real hardware are also very helpful to figure the timings of the various commands and associated CDD responses, this was the last bit of information missing after the release of C-Trac CD board emulator sourcecode by Nemesis (see viewtopic.php?f=5&t=3020&start=43). Those logs also permit to confirm real hardware CDD behavior vs CD emulator board.

NB: I noticed some status with bad checksums in your log (see below), I assume those are just glitches from the tracing hardware?

Code: Select all

0F.000000.1F - 00.000000.0F
0F.000000.1F - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.52 - 00.000000.0F
9F.000000.52 - 00.000000.0F
9F.000000.52 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F
9F.000000.16 - 00.000000.0F

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Re: mcd-verificator (CD core accuracy tests)

Post by KRIKzz » Thu Jul 02, 2020 9:57 am

Hm, checksums looks ok. which one is bad?
9+F+5 ^ F = 2
9+F+1 ^ F = 6

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Re: mcd-verificator (CD core accuracy tests)

Post by Eke » Thu Jul 02, 2020 12:09 pm

My bad, I forgot checksum was only the last nibble (RS9).

Now I wonder why RS8 bit 2 is set only for 3 frames while reading TOC (RS0=0×9) ?
It apparently still returns disc flags even when reporting 'not ready' status (RS1=0xF) and, according to C-Trac sourcecode, bit 2 indicates the current sector type (0=CD-DA, 1=CD-ROM) while bit 0 indicates the mute status (1=muted).

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Re: mcd-verificator (CD core accuracy tests)

Post by KRIKzz » Thu Jul 02, 2020 8:25 pm

From what i know valid cdd status shown only when RS1 != F

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Re: mcd-verificator (CD core accuracy tests)

Post by Miquel » Wed Jul 08, 2020 1:51 pm

Hi KRIKzz, curiosity just spike up a lot with you messages, what is your project about? Perhaps a MegaCD/SegaCD in a FPGA? Just curious...
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Re: mcd-verificator (CD core accuracy tests)

Post by cero » Wed Jul 08, 2020 5:42 pm

https://everdrive.me/cartridges/mega-everdrive-pro.html

You must have lived under a rock Miquel :P

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Re: mcd-verificator (CD core accuracy tests)

Post by Miquel » Mon Jul 13, 2020 8:41 pm

Both 32X and MCD working from the cartridge port...? I thought that was not possible...
Last edited by Miquel on Wed Jul 29, 2020 5:32 am, edited 1 time in total.
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Re: mcd-verificator (CD core accuracy tests)

Post by cero » Tue Jul 14, 2020 6:57 am

No, it does not emulate 32x. It supports 32x roms when using a real 32x device.

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Re: mcd-verificator (CD core accuracy tests)

Post by Miquel » Tue Jul 14, 2020 3:52 pm

No, I was saying that I thought not possible to have both the 32X and the SCD/MCD working from the cartridge slot at the same time, the MCD being emulated by the everdrive cart and a real 32X.
So you have to choose between 32X or MCD, and no 32X-MCD combo. Am I wrong?
The problem is that the 32X comes first in the chain and dictates the memory map.
Last edited by Miquel on Wed Jul 29, 2020 5:33 am, edited 1 time in total.
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Re: mcd-verificator (CD core accuracy tests)

Post by Eke » Tue Jul 14, 2020 4:50 pm

@KRIKzz: I have a question regarding a specific test in CDC section (see code below in test_std.c)

Code: Select all

    //check cdc registers increment
    mcdWR16(0xff8004, 0x0001);
    for (i = 1; i < 32 + 8; i++) {
        val = mcdRD8(0xff8005) & 0x1F;
        if (i < 32) {
            if (val != i)return 0x08; //address should increment up to 31 (including RS bit)
        } else {
            if (val != 0)return 0x09; //should stop incrementing at 0
        }
        mcdRD8(0xff8007);
    }
This seems to indicate there are actually 32 registers in CDC chip, not 16 as described in LC591x manual, and that AR register (register index) does not reset to 0x00 when register 0xF is read but when register 0x1F is read, which again contradicts LC591x manual and is kinda unexpected.

Did you confirm this on all Mega CD models?
Do you know what is returned when reading these registers ?

PS: I don't think bit 4 is related to RS signal, as this signal is specifically used to tell the chip to update the AR register value when writing to the chip with RS=0. Even if this bit was used to force the value of RS signal, it would not explain why it would suddenly be set after accessing register 0xF.

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Re: mcd-verificator (CD core accuracy tests)

Post by cero » Tue Jul 14, 2020 5:20 pm

@Miquel
Correct. The cart can't emulate Mega CD when sitting on a 32x. The 6 32x-cd games cannot be played on it.

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Re: mcd-verificator (CD core accuracy tests)

Post by KRIKzz » Tue Jul 14, 2020 9:26 pm

Eke wrote:
Tue Jul 14, 2020 4:50 pm
This seems to indicate there are actually 32 registers in CDC chip, not 16 as described in LC591x manual, and that AR register (register index) does not reset to 0x00 when register 0xF is read but when register 0x1F is read, which again contradicts LC591x manual and is kinda unexpected.

Did you confirm this on all Mega CD models?
Do you know what is returned when reading these registers ?

PS: I don't think bit 4 is related to RS signal, as this signal is specifically used to tell the chip to update the AR register value when writing to the chip with RS=0. Even if this bit was used to force the value of RS signal, it would not explain why it would suddenly be set after accessing register 0xF.
I tested it with cdx and mcd2. From what i can remember RS+AR pair acts as internal 5-bit address register, with RS as most significant bit. RS=0 means that you access to regs 0-15, RS=1 for regs 16-31. Regs 16-31 have no any effect and returns 0xff if read them. Gate array reg 0x8005 also actually show 5bit value.

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Re: mcd-verificator (CD core accuracy tests)

Post by Sik » Mon Jul 20, 2020 4:31 pm

I do wonder if MCD+32X does work if you mod the 32X to pass through the /DTACK and audio lines. We know that just passing /DTACK is enough to make Virtua Racing work (which makes it baffling why they didn't do it, seeing how that solved all the SVP compatibility issues).
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Re: mcd-verificator (CD core accuracy tests)

Post by TmEE co.(TM) » Mon Jul 20, 2020 4:48 pm

32X does pass the audio lines on both models (cart + 32X > MD, using chip normally found in Nomad and MD2 VA3), !DTACK is supposed to be connected with a wire from IO board to CPU board but that was never installed in any of the production hardware... I guess they deemed one extra wire for a signal that nothing ever used a too high cost to bare lol.
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