DREQ_FIFO Register
Posted: Tue Jan 04, 2022 7:53 pm
Hello to all.
I've tried to play with the DREQ_FIFO Register.
On real hardware,
It IS write only on the Genny side,
if 68S is not set, then the 32X cannot see it. The read value is always 0.
Thought that could help.
I've tried to play with the DREQ_FIFO Register.
On real hardware,
It IS write only on the Genny side,
if 68S is not set, then the 32X cannot see it. The read value is always 0.
Thought that could help.