SpritesMind.Net

Hello fellows.
The Hitachi SH-7604 Hardware Manual defines the IE bit (bit #2) in CHCR register (§9.2.4) as :

Interrupt Enable Bit (IE): Determines whether or not to request a CPU interrupt at the end of a DMA transfer. When the IE bit is set to 1, an interrupt (DEI) request is setnt to the CPU when the TE bit is set.

(typo theirs)

Then, the VCRDMA register (§9.2.5) :

When a transfer-end interrupt occurs, exception handling and interrupt control fetch the vector number and control is transferred to the specified interrupt handling routine.

Finally, regarding the DMA Transfer Flow (§9.3.1)

If the IE bit in CHCR is set to 1 at this time (end of transfer), a DEI interrupt is sent to the CPU.

So, I have tried to raise a DEI at the end of a DMA (initiated by the 32X, with the DREQ circuitry).
I've set the IE bit,
I have defined a vector in the VCRDMA,
defined a function address in the VBR,
then set up CHRC as $44E5 instead of $44E1.

But it failed.

So, my questions are,
- is DEI implemented in any emulator ?
- has anyone ever tested it on real hardware ?

The idea would be to purge the cache lines of the uploaded data as soon as the DMA is complete.

For now, I bypass this with polling : as soon as the 32x is asked for a DMA, I enable HINT. When I HINT, I check CHCR. If CHCR.TE is set, the DMA is finished and I can purge the cache.

I have searched some commercial ROMs (VR, Kolibri, Knuckles), but none of them seem to use the DREQ :/

ob1 wrote: ↑

Sat Feb 06, 2021 1:16 pm

- is DEI implemented in any emulator ?

Regarding Gens 2.15.4, it looks like it is not implemented.
In sh2a.asm, line 5736 : I don't see anything related to CHCR.IE, DEI or VCRDMA.

Indeed, Gens only implemented what was used by 32X and honestly not much was used so the Gens SH-2 core is pretty incomplete on IO side !

Some tests of Mars Check Program use the DREQ and almost all 32X hardware. And source code of Mars Check Program is in 32X-DDK.

Thank you.
I have retrieved the DDK.
Though it seems to use all the 32X resources, the SH2 DEI seems left untouched.
Indeed, I found no trace of something like "MOV.*_DMAVECTORN0", _DMAVECTORN0 being the label of DMAVCR0.
Plus, the only value for CHCR I found excluded the IE bit.

So, I guess it's fair to say the DEI was never used on the 32X.

I've set the IE bit,
I have defined a vector in the VCRDMA,
defined a function address in the VBR,
then set up CHRC as $44E5 instead of $44E1.

I've done the same test on real PAL hardware, and it doesn't seem to work either :/

Chilly's sound driver uses DMA end interrupts to pass data to the PWM: http://gendev.spritesmind.net/forum/vie ... php?t=1253 , so we do know that setting the 2-nd bitflag in CHCR works on real hardware. Alas, Gens indeed doesn't support this feature, hence no sound effectx in Doom 32X Resurrection there. Works fine everywhere else though.