New Documentation: An authoritative reference on the YM2612

For anything related to sound (YM2612, PSG, Z80, PCM...)

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Huge
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Post by Huge » Sat Aug 11, 2012 3:21 am

Do any games work with that?

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Post by TmEE co.(TM) » Sat Aug 11, 2012 11:00 am

All games except few "broken" tracks in Shinobi III that write junk to test register.

The cihp is Write-Only in my MD2, so all timer values etc. come from original YM, and because I cannot turn off onboard YM without damaging something.
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Post by Huge » Sat Aug 11, 2012 11:25 am

So, record some games then! I vote Streets of Rage 2, level 3, 4, 8 and the boss tune.

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Post by sigMate » Sun Oct 14, 2012 2:21 pm

:shock: Wait... Shall I understand that, except for the $2C register, the YMF276 is register-map and feature-set compatible with the YM2612 ??? I couldn't find any datasheet for the YMF276, but it sounds really good !!!

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Post by TmEE co.(TM) » Sun Oct 14, 2012 2:30 pm

It is a low power OPN2 chip, OPN2L. Apart from the test register it is compatible and does such a naiss sound !
I got to do some real recordings.
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Post by sigMate » Sun Oct 14, 2012 3:48 pm

Does it operate in 5V or 3.3V ? Where did you got any schematics or pin assignments ? Any doc or so ?

Thanks man !

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Post by TmEE co.(TM) » Sun Oct 14, 2012 5:59 pm

5V, with power off modes in that test reg (at least so I think).
I got wiring info from a Japanese site. The chip was used in the last FM Towns models and possibly some arcade machines.
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andlabs
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Post by andlabs » Mon Oct 15, 2012 3:00 am

Just out of curiosity, who made the two YM2612 clones HardWareMan mentioned (TA-07 and SE-95) and are they recent chips? Thanks.

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Post by TmEE co.(TM) » Sat Feb 02, 2013 9:34 am

^ Chinese :P

I started writing my own FM emulation code, and this thread is really great !
I am right now slowly writing the EG code.
There are still a lot of things I don't yet fully understand and looking at Genesis Plus GX and other's FM code has not helped much, the MAME implementation that is quite popular is nearly impossible for me to follow...

Also, how are the decapping related things going on ? It has been quite silent around it.
Last edited by TmEE co.(TM) on Sun Feb 03, 2013 10:55 am, edited 1 time in total.
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Post by Mamizou » Sat Feb 02, 2013 9:08 pm

TmEE co.(TM) wrote:Also, how are the decapping related things going on ? It has been quite silent around it.
I had to wait for a laptop upgrade before continuing to identify the chip parts and whatnot, my machine was swapping itself to death trying to load the massive die image. I started going over it again though, making some progress on the PG.

I guess at some point once I get even more ram in this machine I can try tracing everything out, but HardWareMan will need to fully delayer his OPN2 to get pictures of the underlying layers (like such). Then maybe eventually we can have a visual6502-style visual simulator.

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Post by TmEE co.(TM) » Sun Feb 03, 2013 4:56 pm

Now time for questions...

Image

Where do the Algos/Connections come in ?

I would think I got to store the PG outputs in some way and combine them during each operator updates according to algo setting ?
Also, does this mean each operator is output sequentially, so I get 1 value per operator shifted out the sine table to be processed by PG output and then converted to output, then summed up.....?

I have EG and PG implemented already. LFO and SSG-EG I'll leave for a bit later time.

Any pointers and corrections are greatly appreciated :)

Ginormous thänk you te Nemesis for this awesome information !
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Post by sega16 » Sun Feb 03, 2013 6:33 pm

Momiji wrote: I had to wait for a laptop upgrade before continuing to identify the chip parts and whatnot, my machine was swapping itself to death trying to load the massive die image. I started going over it again though, making some progress on the PG
Are you using windows if so that is your problem not your computer. When I boot my computer into windows 7 already after it finishes starting up it is using over 1gb of ram but on Debian GNU/Linux on start up it takes about 190mb of ram or less and it never uses that swap on my computer but windows 7 uses the swap even when there is a-lot of ram free.

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Post by TmEE co.(TM) » Mon Feb 04, 2013 3:43 am

When you deal with a program that on its own uses couple of hundred MB of RAM and then use it to process an image that is over several Gbytes in size with its layers, then I am afraid it is not going to be limited to just windows.
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Post by Mamizou » Mon Feb 04, 2013 4:23 am

sega16 wrote:Are you using windows if so that is your problem not your computer. When I boot my computer into windows 7 already after it finishes starting up it is using over 1gb of ram but on Debian GNU/Linux on start up it takes about 190mb of ram or less and it never uses that swap on my computer but windows 7 uses the swap even when there is a-lot of ram free.
I'm on a 64-bit Gentoo Linux setup. I previously only had a C2D w\ 4GB RAM, now I have an i7 with 6GB. The image itself is only ~1GB but it adds up when you add layers to the image (which is necessary for tracing stuff without modifying the original image). Right now I was able to crop out a separate image of just the PG at original resolution, and it fully fits within my RAM without swapping. Also having faster graphics hardware helps, since GIMP offloads some processing to it now (I believe Photoshop does as well).
TmEE co.(TM) wrote: Where do the Algos/Connections come in ?
If you look at my first chip image, that happens in the Sine + EG Adder, just above the Sine and Exponential ROMs. While the major details of that image are probably still correct, I'd take the smaller details with a grain of salt as I figure things out deeper.
TmEE co.(TM) wrote:Ginormous thänk you te Nemesis for this awesome information !
I second that! Your information helped me make sense of quite a lot on the chip (and I've learned quite a bit about chip layout and FM audio synthesis :D).

TmEE co.(TM)
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Post by TmEE co.(TM) » Mon Feb 04, 2013 5:29 am

I read more about the subject and it is all starting to come together. It happening in the Sine+EG adder makes sense.

The output from PG multiplication calculator is 20 bit, lower 10 bits are dropped and the data exits the PG and enters "Operator Unit".
I now see a 10 bit modulation input. That must be input from the output Operator unit, but that output is 14 bits.

Now my next question :

Are the lower 4 bits dropped of the 14bit output or something else happens ?

What about algos that got 2 operator outputs go into one operator ? Are those 2 outputs just summed together and fed into the next Op or there is more to it ?
EDIT: seems just summed together. 2 ops at one modulation level sounds same as 1 op at twice modulation level.

Also, the sine ROM is exponentiated so they could just use an adder and no multiplier unit...
How is the PG freq multiplication with MUL parameter handled ? A real multiplier unit ...? Sequential adder would take many cycles before it can give out a proper output...

EDIT: When operators are all summed together (like in case of Algo7) the output is clamped to 14bits range ?
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