Enable / Disable vertical interrupts in Mode Register 2

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siudym
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Enable / Disable vertical interrupts in Mode Register 2

Post by siudym » Thu Nov 03, 2022 6:42 pm

Are there any restrictions on disabling and re-enabling vertical interrupts - i.e. BIT5 in Mode Register 2?

In the code, I had to turn off VBLANK IRQ and then turn it on - everything worked fine on emulators, but the code running on real hardware did not do correctly set bit5 on register 2 ... (generally it did not allow the VBL IRG to be re-enabled).

Mask of Destiny
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Re: Enable / Disable vertical interrupts in Mode Register 2

Post by Mask of Destiny » Fri Nov 04, 2022 1:14 am

The only real restriction is that setting VDP registers also messes with the configured address/destination for writes/reads/DMA. The other thing to keep in mind is that disabling vertical interrupts this way is that it doesn't clear the interrupt pending state. So let's say you had vertical interrupts enabled on the VDP, but masked on the 68K. An interrupt becomes pending, but is not taken because it's' masked on the CPU. You then disable the vertical interrupt on the VDP. Some time later, you unmask the interrupt on the 68K and re-enable the interrupt on the VDP. The interrupt will then fire immediately.

What emulators did you test in?

siudym
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Re: Enable / Disable vertical interrupts in Mode Register 2

Post by siudym » Fri Nov 04, 2022 10:56 am

Thanks, I need to analyze this.

Here is an example in the attachment, the game does not work on a real console, but it works on any emulator. Before loading the gameplay screen of the game, I have to disable VBLANK (update function of collected items on the screen - I turned off VBL "for safety" so that it would not be executed when there are other writes to VRAM in cpu loop), and then I turned on the interrupt again.

I have already corrected the code (disabling VBL IRQ was unnecessary), but I wonder why it works on emulators (fusion, exodus, kgen) and not on the console.

EDIT...
Eh ... I already know what is wrong, instead of writing $ 8114 under mode set register #2 I wrote $ 8120 ... :(
Attachments
smd_engine_test_fix.zip
(65.6 KiB) Downloaded 152 times
smd_engine_test.zip
buggy version
(65.76 KiB) Downloaded 150 times

Mask of Destiny
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Re: Enable / Disable vertical interrupts in Mode Register 2

Post by Mask of Destiny » Tue Nov 08, 2022 5:38 am

siudym wrote:
Fri Nov 04, 2022 10:56 am
I have already corrected the code (disabling VBL IRQ was unnecessary), but I wonder why it works on emulators (fusion, exodus, kgen) and not on the console.

EDIT...
Eh ... I already know what is wrong, instead of writing $ 8114 under mode set register #2 I wrote $ 8120 ... :(
So you inadvertently switched to Mode 4 which not many emulators support since no games actually use it on the Genesis. FWIW, the broken version does correctly fail in my emulator, BlastEm.

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