Code: Select all
tst.l $a10008.l
bne.s SkipJoyDetect
tst.w $a1000c.l
SkipJoyDetect:
bne SkipSetup
lea Table(pc),a5
movem.w (a5)+,d5-d7
movem.l (a5)+,a0-a4
move.b $A10001,d0 ; Check Version Number
andi.b #$0f,d0
beq.s WrongVersion
move.l #'SEGA',$2f00(a1) ; Sega Security Code (SEGA)
WrongVersion:
* Clear VDP RAM
move.w (a4),d0
moveq #$00,d0
movea.l d0,a6
move a6,usp
moveq #$17,d1
InitVDPRegister:
move.b (a5)+,d5
move.w d5,(a4)
add.w d7,d5
dbra d1,InitVDPRegister
move.l (a5)+,(a4) ; DMA fill ...
move.w d0,(a3) ; ... with value 0
* Init Z80
move.w d7,(a1) ; move.w #$100,$A11100 Z80 BUSREQ
move.w d7,(a2) ; move.w #$100,$A11200 Z80 RESET
waitBUSREQ:
btst d0,(a1) ; while (BUSREQ & 0x0 != 0) ;
bne.s waitBUSREQ
moveq #$25,d2
LoadZ80:
move.b (a5)+,(a0)+
dbra d2,LoadZ80
move.w d0,(a2) ; move.w #0,$A11200 Z80 RESET
move.w d0,(a1) ; move.w #0,$A11100 Z80 BUSREQ
move.w d7,(a2) ; move.w #$100,$A11200 Z80 RESET
ClearRAM:
move.l d0,-(a6)
dbra d6,ClearRAM
move.l (a5)+,(a4) ; Turn DMA OFF, Auto-increment 1
* Clear CRAM:
move.l (a5)+,(a4)
moveq #$1f,d3
ClearCRAM:
move.l d0,(a3)
dbra d3,ClearCRAM
* Clear VSRAM
move.l (a5)+,(a4)
moveq #$13,d4
ClearVSRAM:
move.l d0,(a3)
dbra d4,ClearVSRAM
* Init PSG
moveq #$03,d5 ; Put initial values into c00011
LoadPSG:
move.b (a5)+,$0011(a3)
dbra d5,LoadPSG
move.w d0,(a2) ; Turn on Z80
movem.l (a6),d0-d7/a0-a6 ; Clear all registers
move #$2700,sr ; Enable all interrupts
SkipSetup:
bra.s Continue
Table:
dc.w $8000,$3fff,$0100
dc.l $A00000,$A11100,$A11200,$C00000,$C00004
* Set VDP registers
dc.b $04 ; 8004 Palette select
dc.b $14 ; 8114 DMA, Genesis
dc.b $30 ; 8230 A plane : C000
dc.b $2c ; 832c Window : B000
dc.b $07 ; 8407 B plane : E000
dc.b $54 ; 8554 Sprite : A800
dc.b $00 ; 8600 NC
dc.b $00 ; 8700 Background color = 0
dc.b $00 ; 8800 NC
dc.b $00 ; 8900 NC
dc.b $00 ; 8A00 H int = 0
dc.b $00 ; 8B00 Full V, Full H scroll
dc.b $81 ; 8C81 40 cells width
dc.b $2b ; 8D2b H scroll : AC00
dc.b $00 ; 8E00 NC
dc.b $01 ; 8F01 Auto-increment : 1
dc.b $01 ; 9001 64 x 32
dc.b $00 ; 9100 No window
dc.b $00 ; 9200 No window
dc.b $ff ; 93FF DMA length --FF
dc.b $ff ; 94FF DMA length FF--
dc.b $00 ; 9500 DMA src ----00
dc.b $00 ; 9600 DMA src --00--
dc.b $80 ; 9780 DMA src 80----, DMA fill
dc.l $40000080
* Z80 PRG
dc.b $af ; XOR A
dc.b $01,$d9 ; LD BC,$D9
dc.b $1f ; RRA
dc.b $11,$27 ; LD DE,$27
dc.b $00 ; NOP
dc.b $21,$26 ; LD HL,$26
dc.b $00 ; NOP
dc.b $f9 ; LD SP,HL
dc.b $77 ; LH (HL),A
dc.b $ed,$b0 ; LDIR
dc.b $dd,$e1 ; POP IX
dc.b $fd,$e1
dc.b $ed,$47 ; LD I,A
dc.b $ed,$4f ; LD R,A
dc.b $d1 ; POP DE
dc.b $e1 ; POP HL
dc.b $f1 ; POP AF
dc.b $08 ; EX AF,AF'
dc.b $d9 ; EXX
dc.b $c1 ; POP BC
dc.b $d1 ; POP DE
dc.b $e1 ; POP HL
dc.b $f1 ; POP AF
dc.b $f9 ; LD SP,HL
dc.b $f3 ; DI
dc.b $ed,$56 ; IM 1
dc.b $36 ; LD (HL),n
dc.b $e9 ; JP (HL)
dc.b $e9 ; JP (HL)
dc.l $81048f01 ; Turn DMA OFF, auto-increment 01
dc.l $c0000000 ; Write into CRAM
dc.l $40000010 ; Write into VSRAM
* PSG PRG
dc.b $9f,$bf,$df,$ff
Continue:
tst.w $C00004