SpritesMind.Net

That one hurt because it's true and it applies so much to me :lol: Didn't mean to hurt you. We're hobbyist. It's very easy to start a game, a bit less to get a proof-of-concept (that's usually my stop), very hard to get a game almost finished, and insanely hard to have an actual game. Hence the "go...

It's a great question. Steam may be a solution. Moreover, there have been a bunch a new - great - games that have been published quite recently. I would suggest you to get in touch with their editors. I bet they would happily ship another good game. But, if you ask me, it's a great question that sho...

This topic, and everything you have discovered so far, is nothing short of amazing!!!
Congratulations to you!!!

I've done some testing regarding private RAM (cache used as RAM), and how it compares to cache-through SDRAM. My code is something like this : main: ADD #2,R2 ; R2 = counter AND R3,R1 ; R3 = Address Mask. M: $3FFFF ; S: $C00007FF. Not needed for 16-bit tests BRA main MOV.W @R1+,R0 ; R1 = Read Addres...

done some testing on a real PAL 32X, and FILL is ~36% faster than ASM loops.
Your mileage may vary.

Glad it helps ^^

That's exactly the stuff I want to try next.
Beforehand, I would say that the FILL is a bit faster than a well optimized loop, but I'll have us the numbers ^^

Hello to you all. I've been toying around with the VDP FILL function, and especially, trying to trigger it again while already filling. Here's my code: MOV.L !AUTOFILL,R4 ; $20004104 MOV #LINE_WIDTH,R0 ; 40 pixels MOV.W R0,@R4 ; Set Length MOV.L !FRAME_BUFFER2,R0 ; $24000200+128*FB_WIDTH SHLR R0 MOV...

It was just something like this :
https://youtu.be/hlLwG3sYFBs

All right, by looking into Sega SDK\SEGADTS\32X\DEMO\SOJ_32X, I could achieve something (well, I sent a byte from Master to Slave on real Hardware). Here's the stuff: initMaster: * ... MOV #$80,R4 MOV #74,R5 MOV #$20,R6 ; TE | SCK is output BSR initSci NOP * ... with initSci: * IN R4 SMR * R5 BRR * ...

I've set the IE bit,
I have defined a vector in the VCRDMA,
defined a function address in the VBR,
then set up CHRC as $44E5 instead of $44E1.

I've done the same test on real PAL hardware, and it doesn't seem to work either :/

Well, not my thing at first, but I have to say it looks amazing!!
Congratulations !

Thank you very much ^^

Hello to you all. Working on a personnal project, I was able to benchmark the penalty of the Master / Slave concurrency Bus Access. As you know, when Master and Slave both want to access the bus, the Master has the priority, and the Slave can access the bus when it receives the permission to do it. ...

Hello to you all. Working on a personal project, I eventually benchmarked the contention between Instruction Fetch (IF) and Memory Access (MA), as described in §7.4 of the Hitachi SH2 Programming Manual, and especially §7.4.3 : Relationship Between Position of Instructions Located in On-Chip ROM/RAM...