Search found 745 matches
- Sun Jan 05, 2020 4:13 am
- Forum: Hardware
- Topic: Cartridge slot questions
- Replies: 23
- Views: 68029
- Sun Dec 29, 2019 5:24 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 26
- Views: 50585
Re: M68K Bus Control and Vdp
It can be confirmed by a quick test but above notes suggest that when /ZTOV is asserted, IC5 simply copies VD15-VD8 to ZD0-ZD7 (and when /ZTOV is asserted, it copies ZD0-ZD7 to VD15-VD8 and VD7-VD0). It makes no difference on byte write since 68k duplicates VD7-VD0 on VD15-VD8 and on word writes, i...
- Wed Dec 18, 2019 12:37 pm
- Forum: Megadrive/Genesis
- Topic: M68K Bus Control and Vdp
- Replies: 26
- Views: 50585
Re: M68K Bus Control and Vdp
IC5 315-5309 is used to unite the M68K and Z80 buses. It used ZA[7:0] and ZD[7:0] from Z80 side and VA[7:1] and VD[15:0] from M68K side. For setting mode for access through it used this set of control signals: nCAS0 , nLWR , nHL from M68K side and nZTOV , nVTOZ form bus arbiter IC4 315-5364 . So, u...
- Fri Jun 21, 2019 7:23 am
- Forum: Demos
- Topic: Album of drawings 1.0 (Demo)
- Replies: 1
- Views: 6065
Re: Album of drawings 1.0 (Demo)
Why "key" and not "button"?
- Tue Jun 04, 2019 10:29 am
- Forum: Megadrive/Genesis
- Topic: Cart Design Questions
- Replies: 70
- Views: 155902
Re: Cart Design Questions
In terms on the devices I have on board, they are with their estimated power consumption: 1x SAM4S (30mA @ 3.3V) (50mA startup current needed) 1x Intel Max V CPLD (VCCIO 10mA @ 3.3V (40mA startup current), VCCINT ~10mA @ 1.8V) 1x EEPROM @ 50mA So in all, the load on the regulator for 5V->3.3V is 50...
Misplaced
Recently I found the new game for MD/Genesis: Misplaced https://img.itch.zone/aW1hZ2UvNDI4OTA3LzIxNDQzNzQucG5n/347x500/DL9Xjh.png My name is Hara... Every day I start in the same way, I wake up on a small strange island that hovers somewhere in the clouds. And today one of these identical days... We...
- Mon May 27, 2019 2:13 pm
- Forum: Megadrive/Genesis
- Topic: Cart Design Questions
- Replies: 70
- Views: 155902
Re: Cart Design Questions
You guys mentioned earlier that /AS is not asserted for DMA, and that /CAS2 is asserted for DMA. But do you guys know if /CAS0 is also asserted for DMA? If /CAS0 is asserted for all accesses (68k, Z80 and VDP), then I can get the CPLD to listen using /CEO and /CAS0 and therefore have more time to g...
- Tue May 21, 2019 7:09 am
- Forum: Demos
- Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
- Replies: 56
- Views: 129327
Re: MD-NICCC - a 3D Mega Drive experience by TiTAN
Systems without TMSS still don't assert !DTACK at those range.
Ok, then it will be A16000...BFFFFF without !DTACK to use more or less freely.TmEE co.(TM) wrote: ↑Mon May 20, 2019 9:49 pm...but seems only A15xxx range is used by SVP outside normal stuff.
- Sun May 19, 2019 5:05 pm
- Forum: Megadrive/Genesis
- Topic: Cart Design Questions
- Replies: 70
- Views: 155902
Re: Cart Design Questions
It is better to use !CAS2. When it asserts (goes to zero) there is sure stable address in any cycle, include DMA. The only problem with it is you've got shorter access time.
- Sun May 19, 2019 5:00 pm
- Forum: Demos
- Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
- Replies: 56
- Views: 129327
Re: MD-NICCC - a 3D Mega Drive experience by TiTAN
There is also A14000...BFFFFF without !DTACK.TmEE co.(TM) wrote: ↑Sat May 18, 2019 7:39 pmIt can only be used in ranges where VDP doesn't generate it for you such as 800000...9FFFFF. This area is used by 32X and SVP for example. You cannot forcibly override !DTACK since VDP actively drives it on most accesses.
- Sat May 11, 2019 5:11 am
- Forum: Megadrive/Genesis
- Topic: I'm officially building a microcode-level 68000 core
- Replies: 52
- Views: 141486
Re: I'm officially building a microcode-level 68000 core
Also I think we should make cycle and logic accurate 68000 model for FPGA.
- Mon May 06, 2019 5:27 am
- Forum: Megadrive/Genesis
- Topic: I'm officially building a microcode-level 68000 core
- Replies: 52
- Views: 141486
Re: I'm officially building a microcode-level 68000 core
There's also a bit of a fondness for abbreviated variable and function names. Can anyone decipher what this means? bool n2388 = !(s.clk || s.berro || s.n1361 || s.n2735 || s.n2772 || s.n2781); Yeah, me neither. This is just 6NOR logic with those 6 "signals" as boolean variables. I think this is cam...
- Tue Apr 30, 2019 5:47 pm
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 10955462
Re: Questions on writing a new Mega CD emulator
We already discussed nIRQ frequency: http://gendev.spritesmind.net/forum/viewtopic.php?f=13&t=793&start=105#p31682 It's like a nIRQ not synced to any of signal. As I said before, this signal has 6,33ms period time slot. But it don't fire up at every slot (6,33ms), some slots a skipped (when drive co...
- Fri Apr 05, 2019 7:10 pm
- Forum: Cartridge
- Topic: EEPROM mapping for homebrew
- Replies: 9
- Views: 14643
Re: EEPROM mapping for homebrew
I'd would change it like this:
- Wed Apr 03, 2019 2:36 pm
- Forum: MegaLD
- Topic: MegaLD Dumping Project
- Replies: 74
- Views: 430902
Re: MegaLD Dumping Project
It looks like teletext scanlines.