Search found 616 matches
- Sat Jan 22, 2022 4:15 am
- Forum: Mega/SegaCD
- Topic: mcd-verificator (CD core accuracy tests)
- Replies: 26
- Views: 177578
Re: mcd-verificator (CD core accuracy tests)
This seems to indicate there are actually 32 registers in CDC chip, not 16 as described in LC591x manual, and that AR register (register index) does not reset to 0x00 when register 0xF is read but when register 0x1F is read, which again contradicts LC591x manual and is kinda unexpected. Did you con...
- Mon Jan 03, 2022 9:20 pm
- Forum: Megadrive/Genesis
- Topic: Horizontal Interruption Mystery
- Replies: 2
- Views: 7045
Re: Horizontal Interruption Mystery
Both horizontal and vertical interrupts have an interrupt pending flag. This flag gets set if the necessary condition (hint counter expiring/end of frame) is hit even if the corresponding interrupt is disabled. If the interrupt is enabled when the pending flag is already set, it will fire almost imm...
- Wed Mar 10, 2021 1:15 am
- Forum: Video Display Processor
- Topic: VDP 128Kb Extended VRAM mode
- Replies: 44
- Views: 87945
Re: VDP 128Kb Extended VRAM mode
BlastEm is the only emulator to (partially ?) emulate it so be sure to use this emulator which is the most accurate by far when you are testing obscures things like that :) Yeah, my support is fairly minimal at the moment. I emulate 128KB mode's impact on the FIFO, but I don't support actually havi...
- Tue Feb 16, 2021 6:25 pm
- Forum: Megadrive/Genesis
- Topic: Version Register
- Replies: 6
- Views: 12307
Re: Version Register
Right, 315-5402 is special, it shows no TMSS when in JP mode, while TMSS is shown in EN mode. I did notice the freezing problem with TMSS as I tried to dump the ROM when accessing the banking register... Interesting. Were systems with the 315-5402 were actually released outside of Japan, or is this...
- Mon Feb 15, 2021 11:00 pm
- Forum: Megadrive/Genesis
- Topic: Version Register
- Replies: 6
- Views: 12307
Re: Version Register
Yeah, it's zero on a 315-5309 IO chip and 1 on the 315-5402 (integrated IO chip and arbiter on a VA5) and all later IO chip versions. The 315-5402 doesn't have a full TMSS implementation though. Attempting to bank in the TMSS ROM will lock the machine (assuming because !DTACK is not being asserted f...
- Wed Feb 10, 2021 6:41 am
- Forum: Megadrive/Genesis
- Topic: 68K Memory access
- Replies: 9
- Views: 12804
Re: 68K Memory access
In what sequence does it? 1) Address + 0 2) Address + 2 Or 1) Address + 2 2) Address + 0 It depends. Reads are always done the first way. Writes are usually done the first way as well, but the destination of a move instruction is written the second way UNLESS it's using the predecrement addressing ...
- Thu Jan 21, 2021 6:57 pm
- Forum: Megadrive/Genesis
- Topic: 68K Memory access
- Replies: 9
- Views: 12804
Re: 68K Memory access
The cart can't stop the hardware in the console from responding, so it is generally not proper to respond to a read from an address that the console already does. If you want to be compatible with the Sega CD and 32X, you also need to avoid the address ranges they use. The Teradrive additionally use...
- Wed Sep 02, 2020 2:30 am
- Forum: Megadrive/Genesis
- Topic: List of every detectable difference in Mega Drive revisions?
- Replies: 17
- Views: 230996
Re: List of every detectable difference in Mega Drive revisions?
That's something I didn't know, I mainly only commented among the actual consoles (except MD2 VA2, which I would like to get and a VA0 MD1). Discrete YM3438 has longer busy bit cycle from what I remember reading from nukeYKT core notes, compared to 2612 and ASIC which would be another way to detect...
- Sat Aug 22, 2020 2:50 am
- Forum: Megadrive/Genesis
- Topic: List of every detectable difference in Mega Drive revisions?
- Replies: 17
- Views: 230996
Re: List of every detectable difference in Mega Drive revisions?
The Teradrive has a discrete YM3438 and in the other direction there are the MD2 VA2/VA2.3 which have a discrete YM2612.TmEE co.(TM) wrote: ↑Fri Aug 21, 2020 5:30 pmYM3438 only appeared as a block integrated in the MD2 ASIC, which first appeared in MD1 VA7 (the awful sounding MD1s lol).
- Thu Aug 20, 2020 5:26 am
- Forum: Megadrive/Genesis
- Topic: List of every detectable difference in Mega Drive revisions?
- Replies: 17
- Views: 230996
Re: List of every detectable difference in Mega Drive revisions?
These are the detectable differences I am personally aware of * Open bus behavior of the Z80 bus (MD1 VA3 and later always return FF, earlier consoles will return last value read) * Discrete YM2612 vs Integrated YM3438 (the latter allows status to be properly read on all addresses) * Open bus behavi...
- Fri May 31, 2019 8:14 pm
- Forum: Mega/SegaCD
- Topic: Bike shedding a new CD-ROM format
- Replies: 20
- Views: 86356
Re: Bike shedding a new CD-ROM format
I can't find good documentation on what CHD actually does with CDs. So in it's most basic form a CHD is a series of compressed "hunks" of data. Hunks are relatively small (512KB max supposedly) and are compressed individually to allow reasonably random access. For CDs, extra metadata is stored to h...
- Thu May 30, 2019 9:32 pm
- Forum: Mega/SegaCD
- Topic: Bike shedding a new CD-ROM format
- Replies: 20
- Views: 86356
Re: Bike shedding a new CD-ROM format
For most "normal" CD-ROM imaging needs, I kind of feel like MAME's CHD format is probably the right way to go. The lack of proper documentation is a bummer, but it handles multi-track data well and can store raw F1 frames + subcode data. It also supports lossless compression of tracks including FLAC...
- Sun Apr 28, 2019 4:06 pm
- Forum: Megadrive/Genesis
- Topic: Z80 bus + I/O mapping redux
- Replies: 7
- Views: 14506
Re: Z80 bus + I/O mapping redux
As promised, here's that test ROM and here's the source . * a00000-a0ffff => [8-bit bus] Z80 (A15 is ignored) So this is actually a funny one. On the 68K side, all 16 data lines are connected (via the IO chip because apparently they ran out of pins on the bus arbiter, lol), but the bus being connect...
- Fri Apr 26, 2019 3:18 pm
- Forum: Megadrive/Genesis
- Topic: Z80 bus + I/O mapping redux
- Replies: 7
- Views: 14506
Re: Z80 bus + I/O mapping redux
bgvanbur states the Z80 can write to 68K main-CPU RAM (e00000-ffffff), but reads return 0xff. It's further comments that reads return different values on different systems. Stef finds that writes do not work. Steve Snake says they used to on the earliest models. For what it's worth, I have a test R...
- Wed Apr 24, 2019 4:21 pm
- Forum: Demos
- Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
- Replies: 56
- Views: 125987