Search found 487 matches

by Miquel
Sat May 11, 2019 10:18 am
Forum: Demos
Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
Replies: 56
Views: 11388

Re: MD-NICCC - a 3D Mega Drive experience by TiTAN

Oh! There is no instruction prefech on the 65c816, now this makes sense. So this is really a read cycle of one cycle.
by Miquel
Sat May 11, 2019 9:05 am
Forum: Demos
Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
Replies: 56
Views: 11388

Re: MD-NICCC - a 3D Mega Drive experience by TiTAN

TmEE co.(TM) and Stef, If that’s to be believed: http://laughtonelectronics.com/Arcana/Visualizing%2065xx%20Timing/Visualizing%2065xx%20CPU%20Timing.html data bus is in use by two cycles. By reading earlier you are only imposing more speed on RAM. In other words, can you read a byte per cycle? Is NO...
by Miquel
Fri May 10, 2019 4:24 pm
Forum: Demos
Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
Replies: 56
Views: 11388

Re: MD-NICCC - a 3D Mega Drive experience by TiTAN

I'm sorry Chilly Willy, you were saying exactly what I think, I just read "read memory of 1 cycle" and go berserk.

The data is ready at the end of the first cycle, but can't be used until next cycle; so it's two cycles from my point of view.
by Miquel
Fri May 10, 2019 3:35 pm
Forum: Demos
Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
Replies: 56
Views: 11388

Re: MD-NICCC - a 3D Mega Drive experience by TiTAN

I’m sorry but how the hell can a memory be accessed in only 1 cycle?!? You need two cycles at minimum, one to put the address to the address bus, and then another to retrieve data from data bus. For example a NOP takes 2 cycles on a 65816, that sounds correct if there is prefetch. Something is wrong...
by Miquel
Fri May 10, 2019 1:31 pm
Forum: Blabla
Topic: Strong Buzz for new Amstrad CPC game
Replies: 11
Views: 2034

Re: Strong Buzz for new Amstrad CPC game

It's not only capacity but also transfer speed what matters, and that's not a demo: there is a game running in there.
by Miquel
Fri May 10, 2019 1:13 pm
Forum: Demos
Topic: MD-NICCC - a 3D Mega Drive experience by TiTAN
Replies: 56
Views: 11388

Re: MD-NICCC - a 3D Mega Drive experience by TiTAN

Um, wrong, even assuming H40, the bandwidth is only somewhat larger (around 7KB vs around 6KB, if memory serves well), and in H32 they're practically identical. If the Mega Drive had been equipped with 128KB of VRAM you'd be right since in that mode it does indeed double bandwidth :​P Alas… SNES ru...
by Miquel
Thu May 09, 2019 3:49 pm
Forum: Blabla
Topic: Strong Buzz for new Amstrad CPC game
Replies: 11
Views: 2034

Re: Strong Buzz for new Amstrad CPC game

I have to say I'm really exited to see this project accomplished.
by Miquel
Wed May 08, 2019 7:16 pm
Forum: Blabla
Topic: Strong Buzz for new Amstrad CPC game
Replies: 11
Views: 2034

Re: Strong Buzz for new Amstrad CPC game

Do you think CPC hardware can handle the few videos shown? I don’t know its video capabilities so I will trust your word.
by Miquel
Wed May 08, 2019 10:39 am
Forum: Exodus
Topic: Active Disassembly
Replies: 13
Views: 4255

Re: Active Disassembly

Agree, I believe I said that mentioned holes occurs when predictive disassembly is kicking in.
by Miquel
Mon May 06, 2019 11:13 am
Forum: Exodus
Topic: Active Disassembly
Replies: 13
Views: 4255

Re: Active Disassembly

Branch instructions are well behaved since both destinations are easily known, but not necessarily with jump instructions. A text book example can be what a “switch” is in C, it works more or less like this: d0 <= switch value add.w d0, d0 move.w cases(d0.w,pc), d0 jmp cases(d0.w,pc) cases: .word ca...
by Miquel
Sun May 05, 2019 12:17 pm
Forum: Exodus
Topic: Active Disassembly
Replies: 13
Views: 4255

Re: Active Disassembly

I have just tested Exodus this past days and I keep my words, predictive disassembly while being much better than plain disassembly still generates holes of unknown data, here and there. Verified with my own game, so no maybe's. Active disassembly is pretty much perfect, but you need to run all code...
by Miquel
Fri May 03, 2019 11:04 am
Forum: Super 32X
Topic: Using 32x as a 3rd plane, possible?
Replies: 28
Views: 7376

Re: Using 32x as a 3rd plane, possible?

I'm not. The vector ROM points to that table… in the mirror space (i.e. $880200, $880206, $88020C, etc.). That means when an interrupt happens, the 68000 will fetch those addresses and jump to the mirror, which won't respond since the 32X disabled it, and hence the 68000 will be stuck forever waiti...
by Miquel
Thu May 02, 2019 6:39 am
Forum: Super 32X
Topic: Using 32x as a 3rd plane, possible?
Replies: 28
Views: 7376

Re: Using 32x as a 3rd plane, possible?

Anyway, I was reading the 32X docs further, and while RV=1 does indeed preserve the Mega Drive mapping for the most part… it also disables the mirror for some reason. Since the vector ROM remains in place even with RV=1 (why?!), that means interrupts won't work at all as they're hardcoded to point ...
by Miquel
Thu May 02, 2019 5:40 am
Forum: Super 32X
Topic: Using 32x as a 3rd plane, possible?
Replies: 28
Views: 7376

Re: Using 32x as a 3rd plane, possible?

Motorola couldn't up the clocks and their chips started to lag behind others (intel, IBM etc.) who were getting faster and faster, their big flagship chips weren't competitive anymore and customers moved to new things. In the end they dropped 68k line and started doing PowerPC instead... Well, for ...
by Miquel
Thu May 02, 2019 5:27 am
Forum: Super 32X
Topic: Using 32x as a 3rd plane, possible?
Replies: 28
Views: 7376

Re: Using 32x as a 3rd plane, possible?

Sorry, I haven’t explained myself properly. What I want is to use 32x hardware from the MD side only, optionally as a 3rd layer. Then what I need is to setup everything in that manner and shout down both SH2. Right now I’m weighing options. A first idea was to ignore, as much as possible, the SH2 si...