Search found 591 matches

by Mask of Destiny
Fri Feb 16, 2007 6:01 pm
Forum: Super 32X
Topic: Cache Coherency Sanity Check
Replies: 5
Views: 4396

Cache Coherency Sanity Check

So I'm thinking about porting a multi-threaded program I'm working on (an interpretter for a dataflow language if you're curious) to the 32X (or perhaps the Saturn) and I was trying to think of a sane way to use both processors in a reasonably efficient fashion. I think I have a reasonable solution,...
by Mask of Destiny
Wed Feb 14, 2007 7:40 pm
Forum: Mega/SegaCD
Topic: How hard would be to code a NES/SMS emulator
Replies: 31
Views: 24822

The scary thing is that NES is bankswitched... and some nes games have special hardware built in... The bankswitching would be very hard to emulate with dynamic recompilation, wouldn't be? So is the SMS. It certainly brings a few complications, but I think the general task of writing a dynarec is m...
by Mask of Destiny
Wed Feb 14, 2007 3:06 pm
Forum: Mega/SegaCD
Topic: How hard would be to code a NES/SMS emulator
Replies: 31
Views: 24822

I think that 512 (or 512-emulator) KB is quite good... I wonder if its possible to use the segacd communication table to fake the I/O (vdp ports of the nes). That's the way I did it when I was working on that SMS emulator. I mean, if the maincpu runs at fullspeed on pooling the I/O, it may be no la...
by Mask of Destiny
Wed Feb 14, 2007 4:27 am
Forum: Mega/SegaCD
Topic: How hard would be to code a NES/SMS emulator
Replies: 31
Views: 24822

I've done some cycle counting and it's not pretty. If I do a standard 16-bit displacement style jump table, it takes 38 cycles just to read in an opcode and jump to the code that emulates it plus at least another 8 cycles to jump back for the next instruction. Here's the code: ;assume a0 is PC, a2 p...
by Mask of Destiny
Tue Feb 13, 2007 6:53 pm
Forum: Mega/SegaCD
Topic: How hard would be to code a NES/SMS emulator
Replies: 31
Views: 24822

I did a few calculations and it would appear that the 6502 in the NES will take anywhere from 14 to 56 68K (@ 12.5MHz) cycles. 14 is obviously two few cycles to emulate an instruction on the 68000 as each 68K instruction takes a minimum of 4 cycles. You might be able to make up a few cycles on some ...
by Mask of Destiny
Tue Feb 13, 2007 5:39 am
Forum: Mega/SegaCD
Topic: CDROM reading speed
Replies: 24
Views: 16860

Oh, so you were trying to pause the disc while you went and did something else for a while and then unpaused it afterwords because you didn't have an exact 75 sector/second data rate? No wonder you were having speed problems. You're never going to get anywhere near full speed on the Sega CD CD-ROM d...
by Mask of Destiny
Mon Feb 12, 2007 10:25 pm
Forum: Mega/SegaCD
Topic: How hard would be to code a NES/SMS emulator
Replies: 31
Views: 24822

Depends on how accurate you want to be. A 68K at 12Mhz isn't fast enough to do accurate Z80 emulation in anything close to full speed. My thinking is that you might get at least a few games to run reasonably well if you cut some corners. Flag calculation is a real speed killer. When I was working on...
by Mask of Destiny
Mon Feb 12, 2007 1:15 pm
Forum: Announcement
Topic: Forum is now open to public
Replies: 49
Views: 44851

Forget to renew your domain?
by Mask of Destiny
Sat Feb 10, 2007 1:58 pm
Forum: Mega/SegaCD
Topic: CDROM reading issue after subcpu halt
Replies: 30
Views: 20045

So what do you have to do to "kick" the CDD?
by Mask of Destiny
Fri Feb 09, 2007 3:44 am
Forum: Mega/SegaCD
Topic: CDROM reading issue after subcpu halt
Replies: 30
Views: 20045

Yeah, there is an interupt masker :) Perhaps messing with this will get you your results. There's certainly plenty of room for it to not work even if the problem is interupt related, but it's worth a shot. And yeah, i confirm that the CDC generate interupts every few ms... Yeah, every 1/75th of a s...
by Mask of Destiny
Wed Feb 07, 2007 6:29 pm
Forum: Announcement
Topic: Tavern RPG, help needed
Replies: 14
Views: 13250

Out of curiousity, is the PCM chip being put to use already?
by Mask of Destiny
Wed Feb 07, 2007 6:27 pm
Forum: Mega/SegaCD
Topic: CDROM reading issue after subcpu halt
Replies: 30
Views: 20045

Is there some way to temporarily disable interrupt generation from the CDC? If I had to take a wild guess, I'd say that the CDC has problems if it doesn't get a proper IRQ acknowledgement and I would imagine that the 68K doesn't generate an IRQ ack signal when it's halted. Since the CDC (or whatever...
by Mask of Destiny
Thu Feb 01, 2007 8:28 pm
Forum: Tools
Topic: ROM Header and Emulators
Replies: 9
Views: 5744

Are those made by Realtec? There are at least a few Realtec titles that don't work because they use a funny mapper despite the fact that they aren't big enough to need one. It appears to be an anti-piracy measure which is rather ironic since they also made cartridge copiers.
by Mask of Destiny
Thu Feb 01, 2007 8:24 pm
Forum: Super 32X
Topic: Cache coherency
Replies: 8
Views: 6210

I think triggering an interupt on each write would be a lot slower than just accessing all data with the cache turned off. Interupt handling on the SH-2 takes a lot of cycles. What would probably make more sense is to set the processors up as part of a rendering pipeline in which the first processor...
by Mask of Destiny
Wed Jan 31, 2007 5:27 am
Forum: Sound
Topic: how can i do music on megadrive?
Replies: 288
Views: 281467

I see... Maybe it was 4bit adpcm... I cannot check since it was rented game... If i remember correctly, the 32x documentation mentions that GEMS3.0 supports "Delta 4bit" DAC... I suspect it is a sort of adpcm-looking format specialy designed for the z80. Delta 4 bits is exactly the ADPCM 4 bits stu...