SpritesMind.Net

Some games uses 8bit ROM and 74x373 as data bit extender (it keep high byte while low goes directly from ROM itself). CAS2 pin required.

I saw DSView is based on sigrok...does it mean decoder follow the same rule than for sigrok ? if yes, I already know how I could write a command/status decoder and a subcode decoder ;) There was version #2, which was more like Sigrok, and now there is version #3, which is basically a Sigrok-style s...

The records I'd like are listed on the "Signals" part of this page . Be free to ask me because some of them are a little cryptic ;) You already did some of them but unfortunately, I didn't save the pictures and so they're lost. I'm very sorry about that. Like you see, you can take your time. Okay, ...

next step : capture data with my Saleae -> see you in some months ;) 7 years passed since 2017 and I didn't use the Saleae mainly anymore. I still have it but Dreamsource is much handle and you can easily make any decoder you ever need just python it with prefered TXT editor. You can even unzip the...

Genny dev today is equal to SDGK dev so everyone is on SGDK support's Discord. Discord allows quick question/answer, etc... so it's a very good media for that. NesDev has his own discord server. With the whole spectrum of NesDev topics/rooms. Does SpritesMind only have a discord server specifically...

danibus wrote: ↑

Mon Sep 04, 2023 5:21 pm

We had mega sg fpga but not sure if you can use their work.

I'll use only our decap project as source. I don't want to use any other one's.

Ok, our team almost done reverse engineering MD ASICs with it's decap. Some of team members was made a hardware level emulator and even FPGA one. Now my turn to finish this project. Finally I done with this: https://i.ibb.co.com/TYJFQ2P/IMG-1526.jpg This is Megadrive that rebuild on custom PCB with ...

Eke wrote: ↑

Sun Aug 06, 2023 9:14 pm

That's impressive... and an unvaluable source of information. Thanks for your work

Yeah, our team do the best. Now I am happy again.

As I already said here we opened the MD decapping project. One of it branch is was YM2612/YM3438 FM chip. Now the new dedicated to FM chip project is started and almost die perfect verilog model is available here . Testbench: https://github.com/nukeykt/Nuked-OPN2-FPGA/raw/main/imgstore/testbench.jpg...

Okay. The decapping really confirmed the fact that the ZA[0] pin of arbiter 315-5364 is indeed a /UDS signal synchronized with the VCLK signal.

Okay. We open the GIT repository about SEGA chips for everyone. The link is: https://github.com/emu-russia/SEGAChips

Now you can help to the project if you want to. Or just use our datasets in yours projects. Welcome.

You done it wrong. /ASEL is /CS for whole 8MB region. I'll just leave it here. https://i.ibb.co/YhqNCb8/SEGAMAP.png Also your 2NAND logic with /ASEL and /CE0 can burn your console because there must be 2OR logic. So, if you disconnect /CE0 and connect 13 pin to 12 you'll get the right result. Yes, /...

/AS didn't asserted when DMA does access. So yes, using /ASEL is a good idea.

Hello again. Despite all the horror that is happening in the world, we continue the decapping project of Sega Megadrive/Genesis chips. Today I'll show you some quick previews at 10x magnifying level. 315-5364 https://i.imgur.com/3fUK6nn.jpeg TA-04 https://i.imgur.com/WMumyad.jpg 315-5309 https://i.i...