SpritesMind.Net

- No key shortcut for loading MD ROM.
- Windows are not focused on activation
- Can't select the main window with Ctrl+Tab
- Have to click on the disassembly in order to use step commands
- No frame advance command that I could find
- Emulator randomly locks up. I think the chance of it happening ...

The register dumps are taken at different times and are therefore barely useful. Looks like it crashes somewhere around ED1Eh. You need to inspect the stack to find the exact location where it crashed.

Did you also update the ROM size field in the ROM header at offset 1a4h?

Some reconstructed missing instructions, whose microcode addresses do not follow from the schematic. There are, however, columns that look like a possible result from an error in vectorization involving the decoder lines for these instructions.


I126a. 0100111001110101 (rts)
(1) C<=D D<=[DATA:Am ...

Instructions that perform accesses in reverse order are:
- movem.l to -(Am)
- move.l to -(Am)
- eori.l, ori.l, andi.l, subi.l, addi.l, subq.l and addq.l to memory
- negx.l, clr.l, neg.l, not.l on memory
- subx.l and addx.l -(An), -(Am), both reading and writing

All other accesses happen in forward ...

Part 2:


B96. 0000XXX100XXXXXX (btst dynamic memory)
B97. 0000100000XXXXXX (btst static memory)
(1) PC<=A C<=BIT&D CCR<=Flags.L A<=A+2 CHECK [PROGRAM:A]
(2) D<=[LAST] PREFETCH[LAST] FETCH F<=IMM
End

B98. 00001000X1XXXXXX (bchg, bset static memory)
B99. 0000XXX1X1XXXXXX (bchg, bset dynamic ...

Here are the rest of the instructions.

Note: A.Count refers to bits 0-5 of the A register.

Instruction patterns without microcode:

#0. XXXXXXXXXX1111X1 except #2, #3 illegal
#1. XXXXXXXXXX11111X except #2, #3 illegal
#2. 1110XXXXXXXXXXXX
#3. 011XXXXXXXXXXXXX
#4. 0000XXX011XXXXXX except #5 ...

Hi, I just wanted to share some of my notes I made a while back. This is based on Galibert's schematic, so in these notes the chip is assumed to be oriented such that the A13 pin is on the upper left. A lot of this is probably well known already, but I thought it'd be nice to have it all in one ...

Really? Same? In sonicretro there are three different tables for three different SMPS versions for coordination flags.
What I mean is that within any one of these versions, the format for music and sound effects is the same (except for the extra byte in the track header for which channel to use ...

IRQ6: vblank
IRQ4: hblank
IRQ2: controller port TH pin

Strange, no info about ASDR here. I see that there is coordination flag for changing volume of PSG channel, but it's not ASDR support. May be it's another custom modification of SMPS?
Well, not exactly ADSR, but there's something they call the "flutter table" which is just an arbitrary curve. And ...

All playing music keeped in Z80 memory, so you have restriction on size of sequence.
No, most games that use SMPS keep the music in ROM. The only game that I know of that loads it into Z80 RAM is Sonic 2.

6) PSG ASDR emulation. (correct me, if it's implemented in SMPS)
Yeah, SMPS supports ...

Sonic 1 uses the Z80 exclusively for playing DAC samples, as does Phantasy Star 4. You also don't need to be reading things from ROM. The 68000 could write data into Z80 RAM as needed. For example, Sonic 2 has all its music in compressed form, and decompresses each tune into Z80 RAM before playing ...

And why would it be laid out like that? Usually your levels are made out of larger tiles, and you only generate rows and columns of VRAM tiles when needed. Otherwise you run out of space fast. In the rare event that you do have a tilemap in ROM or RAM, it's probably still better to get the column ...

Looks like you are failing to synchronize accesses to the VDP. Make sure that you don't get interrupted in the middle of accessing the VDP by code that also accesses the VDP. Data uploads should preferably happen during blanking.