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MEGA CD Preservation



Sega MegaCD's drive is the easiest part to broke and it's becoming more and more difficult to find a replacement part.

For homebrew developper, it's also very difficult (and costly!) to burn CD-R at low speed for test, debug or release. (there is no more 1x CD burner on the market!)

There is so a real need to for an alternative.

This alternative already exist (while it's mainly for piracy reason) on newer systems : WiiLoader, X360Dock, WODE, ...

To develop an optical drive emulator for the MegaCD, you first should know what you have to emulate.

While newer systems use custom version of IDE or others classic connection, the MegaCD uses its own connection, its own protocal and its own driver.

This page aims to list all the informations needed to emulate the MegaCD drive at the hardware level.

Another alternative will be at the software level (BIOS) which won't be explained here.



This page is awlays in WIP mode.
A lot of informations are still missing or incomplete, so use them as a basis not as official documentation !



This page wouldn't exist without the help of some great people

  • Stef (CDC reverse engineering)
  • Eke (more CDC reverse engineering)
  • l_oliveira (hint on I2S protocol, ...)
  • Nemesis (LC8951 doc)
  • omp (service manual funds)
  • others members involved in the related post

thanks guys, it's what make me so proud to host SpritesMind



The MegaCD 1 (front loading) is made of 3 boards

  1. Main board (logic and sound process)
  2. Sub board (power supply, sound)
  3. CD board, attached to the CD drive (CD controller)


Note : the MegaCD 2 is made of 1 board, which make it harder to mod

Since we want to emulate the CD controller, we'll focus on the connection between main board and cd board.

This connection is made throught a 25 Pin XX inch FCC.

Thanks to the MegaCD1 and MegaCD2 service manuals, we know the name and (almost) goal of each of the 25 pins


the 25 pins connector on MCD1

INSERT schema 5.3 page 9 MCD2

the connection pins on MCD2


Main board

On the main board, we'll focus on  these ICs

  • 68000 (main CPU)
  • Sega 515-5548 (ASIC)
  • LC 8951 (CD ROM processing)
  • LC 7883 (CD DA processing)


While 68000 is the main CPU, the brain of the MegaCD is the Sega 515-5548.

This ASIC drives every component of the MegaCD : memory, data, sound, CD...All of them take receive command from and report to 515-5548.

LC8951 and LC7883 are no exception : according the kind of data it receives from the CD board, 515-5548 forwards the data to one of them.

Since all of commands and reports are digital data, EVEN FOR AUDIO, it's a real good news !


What is happening on the main board ?

  1. 68000 sends command to 515-5548
  2. 515-5548 translates this command to identify IC required (memory, sound, video, data ...)
  3. For CD related command, 515-5548 sends command to CD board (or simply ask for status)
  4. 515-5548 receives status from CD board
  5. if not problem, 515-5548 receives data from CD board
  6. 515-5548 forward the data to LC 7883 if it's music or LC 8951 if it's not



CD board

On the cd board side, we'll focus on

  • CXP2500AQ (CD  DSP)
  • CXP5084 (4bit micro computer)
  • CXA1372AQ (RF Amplifier)
  • CD drive


What is happening on the CD board ?

  1. CXP5084 informs main board it's ready for a new cycle
  2. CXP5084 sends status of previous command
  3. CXP5084 receive a new command from main board (515-5548)
  4. CXP5084 translate this command to command ofor the CXD2500AQ and/or CXA1372AQ
  5. CXA1372AQ sets up CD drive
  6. CD drive flows analog (?) data to CXA1372AQ
  7. CXA1372AQ applies error correction on data
  8. CXA1372AQ sends fixed data to CXD2500AQ
  9. CXD2500AQ informs CXP5084 if  data is music or others
  10. CXD2500AQ informs CXP5084 of its status
  11. CXD2500AQ sends serialized data to main board (515-5548)
  12. CXP5084 stores status and .... loop

Process is missing more details, contact me if you could help !



So what's really define CD workflow ?
  • commands sent to CXP5084
  • status received from CXP5084
  • logic data received from CXD2500AQ

This workflow is more detailled on MegaCD2 service manual

INSERT schema 5.3 page 9 MCD2


To emulate the CD controller means to be able to handle

  • correct communication with main board
  • CD data communication
  • subcode data communication


Communication with main board

Sega 515-5548 sends commands to and receive status  from CXP5084.

But how, when and what exactly ?

You could find the details on page 77 of MegaCD 1 manual

INSERT translation of page 77 of MCD1

Basically, CXP5084 latches an IRQ to inform 515-5448 of the start of a new communication frame.

This communication frame is 1/75seconds long....which happens to be the time of a CD Track's sector.

Within this frame, CXP5084 will send 8bytes (10x 4bit nibble) of status to 515-5448 THEN receive 8bytes (10x 4bit nibble) of command from 515-5448.

Nibbles are 4 bits, which means they could be sent in parallel on the databus.

For command nibbles, nibble0 (TC0) must be shown as the command ID, while the 9 others like (optional) parameters.

While the need for 2 clocks rathen than 1 is still a mystery for me, CPX5084 sends its status nibbles in sync with its CDClock (CDCK) while 515-5448 sent its command in sync with its HostClock (HOCK).

The 2 clocks aren't exactly in sync, there is a delay of 33µs between then, HOCK in first.

Since it's the CXP5084 which drives the communication, CXP5084 latches IRQ every 1/75s, sends back last command status and gets an optional new command.

?? Unfortunatly, the service manual is not readable enougth to know if the 16 bytes takes the full frame or not.

?? It's so not clear if the task, result from the command, have to be handled in this frame or if task could take several frames (due to CD lags, it must be the valid possibility), CPX5084 sending a kind-of "working" status while waiting for results.


CXP5084 "translates" the received command for the CXA1372, which will initiate a CD drive operation (or not).
CXA1372 flows data received to the CXP5084 and the CXD2500AQ.
CXD2500AQ converts data and update D/M status.
CXP5084 updates its status nibble for next frame.
CXD2500AQ starts to flow serial data (see CD data and sub code data)
The commands 515-5548 sends to CXP5084 are nowhere documented.
Sega goals was probably to avoid direct CDC access by developer who so had to use BIOS function.
Hopefully, Stef did a really great job to discover them, with BIOS rom analysis and hardware testing.
Eke fixed and added more details later.
CDC Commands
ID Description Parameters Status Notes
0x00 Get Status -    
0x01 Stop Drive -    
0x02 Read Toc / Get Infos TC1 :  info ID    
0x03 Play / Read TC1-TC9 : start position    
0x04 Seek TC1-TC9 : start position    
0x05 unknown ?    
0x06 Pause -    
0x07 Resume -    
0x08 Forward -    
0x09 Rewind -    
0x0A Track jump TC3 : direction (forward/rewind)
TCX : unknown (*)
  related to 0x4X command from CXD2500AQ ?
0x0B unknown ?    
0x0C Close tray -    
0x0D Open tray -    
0x0E unknown -    
0x0F unknown -    
While the available commands description seems to be enought to handle the commercially available games, I think missing or incomplete commands could be found with
  • Flux analysis
  • Wonder libray analysis
  • X eyes and WonderMega bios analysis
  • sniffing commands sent to CXD2500AQ, according commands sent to CXP5084 (see CXD2500AQ pins DATA, ClK, and XlAT)
Want to apply for the job ?  ;)

CD data with main board

Whatever the data is (Audio or others), its flows on the SDATA, serialized.

Thanks to l_oliveira, we know it uses the I2S protocol, with
  • a bit clock (BLCK) 
  • a frame clock (LRCK), to drive left (HIGH) then right (LOW) channel
  • serial data (SDATA)
  • error flag (C2PO)
According I2S specification, BLCK is sample rate x number of channels x bits per channel.
So it should be 44.1KHz x 2 (stereo) x 16bits.....but according page 91 of CXD2500AQ datasheet and page 76 MegaCD 1 manual, we know it's in fact 44.1KHz x 2 x 24 bits, because CXD2500AQ has a 48bits (24 bits per channel) precision.
About LRCLK, it  is 2 x sample rate.
So, in fine, we have
  • BCLK =  2.1168MHz
  • LRCK = 88.2KHz
  • SDATA = channel L first,  two's complement with MSB first, filling the 8bits "missing"
?? What seems to be different between Audio and Data mode is the C2PO bus.
According page 18 of CXD2500AQ datasheet and page 76 MegaCD 1 manual,  i its 2x8bits or 1x16bits... what's difference ?? 
more analysis in progress

Subcode data with main board

Subcode and CD+G data is send throught other pins.

  • block clock (SCOR)
  • serial data  (SBSO)
  • frame clock (WFCK)
  • host clock (EXCK)

Page 24 & 25 of the CXD2500AQ datasheet explain the process.

more analysis in progress