Question about bus arbiter
Posted: Thu Sep 04, 2014 5:35 am
When dma is progressing The Z80 can't access to 68K bus.
How it works?
For example i think when dma start there is a bus request sent to 68K wich freeze 68K during dma 5I think the correct vdp pin is connected to the correct 68K pin to avoid this mecanism).
How it works in Z80 side?
There is a block diagram describing how pins are connected?
How it works?
For example i think when dma start there is a bus request sent to 68K wich freeze 68K during dma 5I think the correct vdp pin is connected to the correct 68K pin to avoid this mecanism).
How it works in Z80 side?
There is a block diagram describing how pins are connected?