Megadrive video timings

Eke · Post by **Eke** » Sat Jan 09, 2010 2:51 pm

Here's small example of the slight differences in the highlight :
RGB:
http://www.fileden.com/files/2008/4/21/ ... arsRGB.jpg
S-video (using TV's sharpness setting to enhance the effect a bit) :
http://www.fileden.com/files/2008/4/21/ ... erence.jpg

The thing is that on the signal recording (directly from VDP output, right ?), there isn't any noticeable differences in the voltage level. There is indeed some voltage drop or jump which result in a tiny separation between bars (some time darker, some time lighter) that gives the impression color changes but they are the same. The tiny voltage variation is probably due to the VDP internally switching between highlight & normal.

HardWareMan wrote:Now I have an oscilloscope too. I'd made some records of EDCLK singnal. Take a look:

You can take full record here (use UltraScope for viewing).
Now, it's look like EDCLK more complex, than we think. So, what do you think?

I looked into this and it indeed seems that there are 60 EDCLK at MCLK/5 during a line, like Jorge Nuno measured but that these clocks are "interrupted" by MCLK/4 clocks, like this:

15 cycles @MCLK/5
2 cycles @MCLK/4
15 cycles @MCLK/5
2 cycles @MCLK/4
15 cycles @MCLK/5
2 cycles @MCLK/4
15 cycles @MCLK/5

It seems that HSYNC signal is what triggers the changes in EDCLK frequency, with some latency though.

The total is still 840 EDCLKS (420 pixels) with 780 @MCLK/4 and 60@MCLK/5 (total is 3420 MCLCKS).

HardWareMan · Post by **HardWareMan** » Sat Jan 09, 2010 4:10 pm

I think this dots are caused by EDCLK. Just thoughs...

TmEE co.(TM) · Post by **TmEE co.(TM)** » Sat Jan 09, 2010 4:29 pm

2 missing ones in every 64 pixel "zone".....

the dots are VDP CRAM writes there, each pixel being in color the color getting into written CRAM... in that case, things are transferred via DMA, each dot represents one "access slot".

HardWareMan · Post by **HardWareMan** » Mon Jan 11, 2010 4:49 am

I made record of control bus signals of VRAM (SE0, SC, RAS1, CAS1, WE0, OE1) in last scanline interval of gradient ladder of TmEE SHLTEST. But, Ultrascope allows show only 2 signals, and we need to show 7. Maybe, I can load it as RAW sound data in multitrack sound editor? Any thoughs?

Snake · Post by **Snake** » Thu Jan 14, 2010 12:07 am

TmEE pointed me at this thread, and I read this:

tomaitheous wrote:To clear up S/H, normal once and for all? I've heard that S/H fits nicely into a 12 bit palette and that S/H just adjust the step increments. But I've also read that idea/method this doesn't display right for all games.

... and thought 'ah, this old argument again...' - but now I've read the rest of it.

Clearly, S/H mode does indeed basically (almost) double the number of colours, and the 'doesnt display right for all games' thing is just wrong. I tested this way back in the KGen days.

But, on my crappy old TV, through RF no less

- it looked like the crossover point from normal to highlight was at 0x888 - and since that made perfect sense, that's what I did. From Hardwaremans posts its clear the crossover point is actually at 0x777. No big deal, but nice to know

TmEE - fix your program so it displays this properly on real hardware please

While I'm here:

I really doubt you can freeze the CPU in the middle of instruction. At least you can't interrupt it like this for sure. There is some delay between writing the command and actual DMA start/CPU freeze anyway
well, according to the 68k user manual, Bus Access is granted between memory cycles so theorically, this could happen.

but you are right, VDP reaction is not immediate

Yes, it is. When you write the final word to the VDP that will trigger a DMA, the 68K is *immediately* locked until the DMA completes - even if it was in the middle of a move.l instruction. Surprising, but true. Another thing I documented a long time ago.

Graz · Post by **Graz** » Thu Jan 14, 2010 12:40 am

Another thing I documented a long time ago.

Any chance that documentation is available for us to read?

Snake · Post by **Snake** » Thu Jan 14, 2010 12:44 am

It was all posted on a devchannel set up by (I believe) Charles Macdonald, and I don't know if it's still around. I did keep notes of a lot of this stuff but then lost it

However, pretty much every emulator out there since then handles all the stuff I found.

mickagame · Post by **mickagame** » Thu Jan 14, 2010 6:51 am

Snake wrote:TmEE pointed me at this thread, and I read this:
tomaitheous wrote:To clear up S/H, normal once and for all? I've heard that S/H fits nicely into a 12 bit palette and that S/H just adjust the step increments. But I've also read that idea/method this doesn't display right for all games.
... and thought 'ah, this old argument again...' - but now I've read the rest of it.

Clearly, S/H mode does indeed basically (almost) double the number of colours, and the 'doesnt display right for all games' thing is just wrong. I tested this way back in the KGen days.

But, on my crappy old TV, through RF no less - it looked like the crossover point from normal to highlight was at 0x888 - and since that made perfect sense, that's what I did. From Hardwaremans posts its clear the crossover point is actually at 0x777. No big deal, but nice to know

TmEE - fix your program so it displays this properly on real hardware please

While I'm here:

I really doubt you can freeze the CPU in the middle of instruction. At least you can't interrupt it like this for sure. There is some delay between writing the command and actual DMA start/CPU freeze anyway
well, according to the 68k user manual, Bus Access is granted between memory cycles so theorically, this could happen.

but you are right, VDP reaction is not immediate
Yes, it is. When you write the final word to the VDP that will trigger a DMA, the 68K is *immediately* locked until the DMA completes - even if it was in the middle of a move.l instruction. Surprising, but true. Another thing I documented a long time ago.

Very interesting !!!
It could explain the special effect from mickey mania?

Eke · Post by **Eke** » Thu Jan 14, 2010 10:05 am

Very interesting !!!
It could explain the special effect from mickey mania?

Not really, this issue is probably more related to the way VDP is processing sprites during HBLANK: when display is disabled, sprite processing is very likely also disabled and the result is that only some of the sprites will be processed for the upcoming line (in Mickeymania, the first 5 sprites with xpos=0 are processed, you could eventually relates this to the number of clocks during which display is disabled).

The only way to know exact timings would be to spy those VRAM bus signals and see how, when and what stuff are fetched from VRAM

tomaitheous · Post by **tomaitheous** » Sun Jan 17, 2010 6:30 am

Snake wrote:TmEE pointed me at this thread, and I read this:
tomaitheous wrote:To clear up S/H, normal once and for all? I've heard that S/H fits nicely into a 12 bit palette and that S/H just adjust the step increments. But I've also read that idea/method this doesn't display right for all games.
... and thought 'ah, this old argument again...' - but now I've read the rest of it.

Clearly, S/H mode does indeed basically (almost) double the number of colours, and the 'doesnt display right for all games' thing is just wrong. I tested this way back in the KGen days.

But, on my crappy old TV, through RF no less - it looked like the crossover point from normal to highlight was at 0x888 - and since that made perfect sense, that's what I did. From Hardwaremans posts its clear the crossover point is actually at 0x777. No big deal, but nice to know

TmEE - fix your program so it displays this properly on real hardware please

While I'm here:

I really doubt you can freeze the CPU in the middle of instruction. At least you can't interrupt it like this for sure. There is some delay between writing the command and actual DMA start/CPU freeze anyway
well, according to the 68k user manual, Bus Access is granted between memory cycles so theorically, this could happen.

but you are right, VDP reaction is not immediate
Yes, it is. When you write the final word to the VDP that will trigger a DMA, the 68K is *immediately* locked until the DMA completes - even if it was in the middle of a move.l instruction. Surprising, but true. Another thing I documented a long time ago.

I don't remember the argument details, but something about brighter than white (which is now known doesn't exist). Not a big deal, but it's nice to know. Matters to me so I can get my colors correct for my apps though

I'd still like to know what 0xEEE is really is in comparison to 0xffffff (or just 252/252/252). It would be nice to know if steps by 36 are pretty damn close, so I can keep using those

Also, on the interrupt/halt in between cycles of an instruction; are they in segments of 4 cycles or as low as 2 cycles?

Snake · Post by **Snake** » Sun Jan 17, 2010 6:16 pm

tomaitheous wrote:Not a big deal, but it's nice to know.

Oh, sure, very nice

But a bit different to what people have been implying to me for a long time, i.e. that the whole thing was way off.

tomaitheous wrote:It would be nice to know if steps by 36 are pretty damn close, so I can keep using those

From what I can tell the steps are around 34, so you're pretty close. This was done by outputting from PC to TV and adjusting till it looked right.

However be aware that if you're trying to match the colours on a TV, the NTSC or PAL encoding does, in some cases, make a HUGE difference, and certain colours can look completely different.

tomaitheous wrote:Also, on the interrupt/halt in between cycles of an instruction; are they in segments of 4 cycles or as low as 2 cycles?

I believe it's immediate, I.E. if you write a long in which the high word triggers a DMA, and the low word does something that'd completely break that DMA, the DMA always works as expected, and the final word is written after. Figuring out at exactly which cycle the write is performed isn't easy, but probably doesn't make any difference. At least for every possible instruction I tested it made no difference.

It's a bit naughty anyway and probably shouldn't be used

TmEE co.(TM) · Post by **TmEE co.(TM)** » Mon Jan 18, 2010 3:37 am

http://www.fileden.com/files/2008/4/21/ ... madSHL.jpg

This is consistent between 4 nomads... fun part is that VDP analog stuff is same as other MD's got, only difference is ASIC which is 5700 and so far I've only seen it in Nomads... I'm not going to swap the ASICs with some MD2 though, I need a more fuxored Nomad first to do that and verify that this is ASIC not external circuit dependant.

Snake · Post by **Snake** » Mon Jan 18, 2010 5:21 am

This is straight from the Nomad screen? It may not have enough colour resolution. Do those things have a TV Out?

TmEE co.(TM) · Post by **TmEE co.(TM)** » Mon Jan 18, 2010 5:54 am

I just tried it on TV over RGB and it looks like my MD1 and MD2...

This may have osmething to do with the LCD itself, since there's ghosting going on horizontally and vertically... I guess if I remove the top bards I get things "right" on bottom.

Eke · Post by **Eke** » Thu Feb 04, 2010 8:22 pm

HardWareMan wrote:
Eke wrote:Now, if you can sample MCLK, maybe you can do some of the video signal measures with a game using H32 mode and horizontal interrupt. Or use EDCLK as a reference (pixel clock is only output through some undocumented VDP register bits).
What game use H32 mode? Or give me demo, wich do that.

Back on this:
Nemesis's Sprite Test program can switch between both modes, it does not use interrupts though. The link is here.

Otherwise, the first demo on thatpage uses H32 mode, it should be using interrupts.

I would be curious to have measures of /YS, EDCLK, /HSYNC, IPL2 signals with MCLCK as reference in both modes