Help with 68k Adressing mode calculation

Ask anything your want about Megadrive/Genesis programming.

Moderator: BigEvilCorporation

Post Reply
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Help with 68k Adressing mode calculation

Post by mickagame »

Hello

I'm working actually on a 68k core that synchronize at each memory access (without threaded mecanism).

I'm stressing my core with JSON Test Suit : https://github.com/SingleStepTests/ProcessorTests

I have problem with this test :

"name": "000 ADD.l D5, (d8, A3, Xn) dbb3",

Initial important states are :

"d5": 0x14fbcc8
"a3": 0x3e4d4a5b
"d0": 0xa1e940b7
prefetch 0 : 0xdbb3 (the opcode)
prefetch 1 : 0xc4f (extension word)

The test attempt cpu write at this adress (in order) :

0x4542aa : 0xc606
0x4542a6 : 0x2313
0x4542a8 : 0x70
0x4542a4 : 0xdbb3
0x4542a2: 0xdbb3
0x45429e : 0x8b61
0x4542a0 : 0xee036

I don't understand how (d8, A3, Xn) can give write access at this effective adress.

I must miss something so any help is appreciated !
HardWareMan
Very interested
Posts: 757
Joined: Sat Dec 15, 2007 7:49 am

Re: Help with 68k Adressing mode calculation

Post by HardWareMan »

M68000PRM, page 2-9 (abs: 50):
Image
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Re: Help with 68k Adressing mode calculation

Post by mickagame »

Address Register A3 : 0x3e4d4a5b
+ Displacement (s8) (0xc4f) = 0x4f
===> Result = 0x3E4D4AAA
+ Index d0 : 0xa1e940b7 (No scale for M68000)
===> Result = E0368B61
<=> 0x368B61 (24 bits)
It doesn't correspond to 0x4542aa ... 0x4542a0 area

:?:
HardWareMan
Very interested
Posts: 757
Joined: Sat Dec 15, 2007 7:49 am

Re: Help with 68k Adressing mode calculation

Post by HardWareMan »

BAD opcode?
Image
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Re: Help with 68k Adressing mode calculation

Post by mickagame »

I finally found the reason.
This is because the test do misaligned access so the cpu have to generate an exception and write at ssp address.
HardWareMan
Very interested
Posts: 757
Joined: Sat Dec 15, 2007 7:49 am

Re: Help with 68k Adressing mode calculation

Post by HardWareMan »

Indeed, the EA result is an odd address, I missed this point.
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Re: Help with 68k Adressing mode calculation

Post by mickagame »

This test is making a "address error" exception. These access correspond to push to ssp pc, sr, ir and address access
HardWareMan
Very interested
Posts: 757
Joined: Sat Dec 15, 2007 7:49 am

Re: Help with 68k Adressing mode calculation

Post by HardWareMan »

Yes. And you calculated it correctly:
Address Register A3 : 0x3e4d4a5b
+ Displacement (s8) (0xc4f) = 0x4f
===> Result = 0x3E4D4AAA
+ Index d0 : 0xa1e940b7 (No scale for M68000)
===> Result = E0368B61
<=> 0x368B61 (24 bits)
It doesn't correspond to 0x4542aa ... 0x4542a0 area
Stack frame:
0x4542aa : 0xc606
0x4542a6 : 0x2313
0x4542a8 : 0x70
0x4542a4 : 0xdbb3
0x4542a2: 0xdbb3
0x45429e : 0x8b61
0x4542a0 : 0xee036
Result = E0368B61 = 0x4542a0 : 0xE036 0x45429e : 0x8B61


Just in case the exception stack frame format are described at page B-3 (abs: 630) in M68000PRM.
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Re: Help with 68k Adressing mode calculation

Post by mickagame »

My test is ok now :-) Thanks
mickagame
Very interested
Posts: 262
Joined: Sat Jun 07, 2008 7:37 am

Re: Help with 68k Adressing mode calculation

Post by mickagame »

My test is ok now :-) Thanks
Post Reply