A bit, but one thing I can say from an initial read-through:jotego wrote:I hope I have not lost you with this long post.
I am quite confident from viewing the die shots, and it seems to be sufficiently confirmed from testing, that whenever you write a data value, BUSY gets set, and gets cleared exactly 32 cycles later. On the die shot it's just a 5-stage counter, not connected to anything else.
Of course the chip actually "consumes" the written data value at some point within the first 24 (or possibly a couple more) cycles of it being written, when its value comes around in whatever circular shift register. (They're all 24 stages or less.)
I see that what you're saying is that, as far as you can see, if you write the key on register just after op 1's key on bit came around, it waits until it comes around again so that the key on bits are always updated in the order 1, 3, 2, 4. This is possible--I haven't worked out any of the control units in detail--but this is easily testible.
Write all four operators key-on on one cycle. Exactly 24 cycles later, write all of them key-off. On the naive implementation, you will get each operator to output a nonzero value exactly one sample (possibly not all on the same sample, but one each). On your implementation, one of two things will happen: either the new key-on value will overwrite the old, and some of the operators will have never received a key-on; or the new value will be discarded, and some of the operators will remain keyed on afterwards. Both of these conditions should be observable even on one sample (if release is set to a long value, you can notice any operator which was keyed on for only one sample; and as long as decay level is not zero, you can also tell it apart if the operator was never keyed off).
The thing is that, if your implementation is correct, it would take a maximum of 18+23=41 cycles to update the keyon states of all four operators. Which means, you could write a certain keyon value, wait the 32 cycles the dumb BUSY timer (and the datasheet) told you to, and then write a different keyon value, and have the output be blatantly incorrect (compared to what the datasheet specified), i.e. have some operators still on or never turned on. I am a bit doubtful that Yamaha would have added the additional logic to make sure the operators got keyed on in the correct order, when this could lead to strictly incorrect performance, while the only penalty for not adding this logic would be modulation being wrong for a single sample.