I've tried just setting 0xA130F1 and reading/writing 0x200000. This works with emulation, but not on real hardware (my MD-pro 64 cart).
I've tried setting RV (which makes the ROM appear in the normal area for the 68000), setting 0xA130F1, and reading/writing 0x200000. Again, this works for emulation, but not on real hardware.
I've tried setting the rom bank, setting 0xA130F1, and reading/writing 0x900000. That doesn't work for either emulation or real hardware.
The MD-Pro works with SF4, so it shouldn't be a problem with 0xA130F1 or where the SRAM is located. It seems to be a 32X issue. Anyone have any suggestions?
EDIT: In case it helps, here's the current code I'm using:
Code: Select all
read_sram:
move.w #0x2700,sr /* disable ints */
moveq #0,d0
move.w 0xA15122,d0 /* COMM2 holds offset */
lea 0x200000,a0
bset #0,0xA15107 /* set RV */
move.b #1,0xA130F1 /* SRAM enabled */
move.b 0(a0,d0.l),d0 /* read SRAM */
move.b #0,0xA130F1 /* SRAM disabled */
bclr #0,0xA15107 /* clear RV */
move.w d0,0xA15122 /* COMM2 holds return byte */
move.w #0,0xA15120 /* done */
move.w #0x2000,sr /* enable ints */
bra main_loop
write_sram:
move.w #0x2700,sr /* disable ints */
moveq #0,d1
move.w 0xA15122,d1 /* COMM2 holds offset */
lea 0x200000,a0
bset #0,0xA15107 /* set RV */
move.b #1,0xA130F1 /* SRAM enabled */
move.b d0,0(a0,d1.l) /* write SRAM */
move.b #0,0xA130F1 /* SRAM disabled */
bclr #0,0xA15107 /* clear RV */
move.w #0,0xA15120 /* done */
move.w #0x2000,sr /* enable ints */
bra main_loop