SpritesMind.Net

I'm wondering if anyone (Fonzie?) can elaborate on this forum about the cartridge connector signals which were discussed here:

http://segaxtreme.net/community/topic/1 ... -analysis/

There are a couple of things I'm curious about:

- How to detect a read from the /TIME area. Since it is only pulsed for reads and writes, I suppose checking for /LWR and /UWR inactive could be one way. But I wonder if one of the other read strobes like /CAS0 is valid in that range.

- Which signals on the cartridge connector change when /CART is pulled high, putting the system in Sega CD (floppy disk drive!) mode. In the linked thread patroclus02 answered some of this.

- Which signals become SMS signals in Mark-III mode. I gave up tracing a Power Base Converter, but I'm sure it would be easy to tell from a third party adapter (which may not hook up all the signals) or a Phantasy Star MD cart.

- Which signals are affected by enabling DRAM refresh mode in $A11000.

- In general what the purpose of the uncommon strobes are; nearly all games use /CE0 for ROM /CE and /CAS0 for ROM /OE.

I use !CAS0 for reads, and LWR/UWR for writes when messing with !TIME.

In MCD/Floppy mode, the !CE0 singal goes into $400000....$7FFFFF instead of $000000....$3FFFFF

DRAM refresh should only affect !CAS0 (timed pulses happen then, like on RAM !OE signal)


http://wiki.megadrive.org/index.php?tit ... Interfaces

Thank you! Just what I needed to know.

I was looking at the old Sonic 3 save RAM thread and was wondering if you could elaborate on some points:

So Sonic 3 has FeRAM enabled at 200000-2003FF when A130F1 bit 0 is 1. What is there when this bit is 0? Mirror of ROM data?

I know S&K has a secondary 256K mask ROM that has supplemental data for Sonic 2, but I can't recall how it is enabled. So I'm curious about the memory map for S&K. Is it something like this:

000000-1FFFFF : S&K ROM
200000-3FFFFF : Lock-on cartridge ROM

In this case where does the FeRAM and secondary ROM fit in? Are there bits allocated at, say, A130F3 to control them?

I have forgotten details (I messed with S3 and S&K quite a bit a while ago)...

State of Bit0 gets stored in a 74x74 flip flop when !TIME signal is pulsed.
The whole A13000...A130FF area is treated same, there's no extra address decoding going on.
When its zero then there's no FeRAM on 200000...3FFFFF, if its one, then you got FeRAM there. I recall there being some measures taken that it won't be completely mirrored in the 20000...3FFFF range, I need to check my schematics when I get back home....

S&K cart logic was quite simple, and it also has a 74x74 to store the first bit of the data bus on !TIME pulse.
IIRC, when 74x74 is One, then the 20000...3FFFFF side on top of ther cart is split in 2, the 200000....2FFFFF is lock on ROM and 30000....3FFFFF is the Sonic2 support ROM. 000000....1FFFFF is still S&K ROM.
With Sonic3, the FeRAM will be visible in 200000....2FFFFF area when the signal is One.
When its Zero, the 000000....1FFFFF will be S&K ROM, and 20000...3FFFFF will be lock on ROM, and first half of it (000000....1FFFFF).
"Magic" is done with the lock on cart !CE line to get first part appear in the right place

I hope I did not make any mistakes, its been a while...

^^