New Documentation: An authoritative reference on the YM2612

For anything related to sound (YM2612, PSG, Z80, PCM...)

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Christuserloeser
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Post by Christuserloeser » Tue Sep 14, 2010 1:43 am

BRPXQZME wrote: Image
Audio output: Two (2) channels, L and R. Nine (9)-bit stereo DAC included.

Image
6. Accumulator

The accumulator adds together and accumulates for each channel the output (9-bit) of each slot for each channel sent from the operator, and sends it to the D/A converter.

Therefore, not only does it perform sound construction, there is nothing in particular to look out for.

7. D/A converter and output selection

7-1. D/A converter

The D/A converter converts the result calculated in the accumulator into analog voltages.

Also, the OPN2C can perform D/A conversion on the data written in the address $2A registers. This encodes analog sound into eight (8)-bit data and does this by writing these in order to the $2A registers.

The sampling rate for this is 55.5 kHz.

→cf. 1-2. Registers for D/A use

Image

[in figure: レベル = “level”, 時間 = “time”]

Fig. 2.3: Envelope waveform and each parameter

* The envelope’s waveform changes exponentially during attack; at the rest of the rates, it changes linearly.

Also, in the internal calculations, it has a zero (0) to negative ninety-six (-96) dB range, but due to the precision of the DAC, the actual dynamic range ends up being zero (0) dB to negative fifty-four (-54) dB.

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◻ TL (Total Level): $40–$4E

The setting of the output level is performed through the total level. The weight of each bit indicates the attenuation value. Therefore, “00” means attenuation of zero (0) dB (the maximum level), and “7F” is ninety-six (96) dB (the minimum level). However, in the case of the OPN2C, the internal D/A converter is nine (9)-bit, so the actual analog audio output becomes equivalent to fifty-four (54) dB. Therefore, compared to the OPN, even if the exact same parameters are set, there are cases where the analog sound output will overflow entirely.
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Post by TmEE co.(TM) » Tue Sep 14, 2010 7:08 am

Regarding the PCM/DAC register, it is said the sample rate is 55.5KHz(for 8MHz master clock), but whenever I go past half it, I start getting missed writes which result in distortion/cracking/etc. on high freqs (i.e if you got 26KHz waveform and you skip a write every once in a while, you'll get shitty sound, especially if the write carried a peak value).
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Post by GManiac » Tue Sep 14, 2010 8:49 am

I confirm that DAC and accumulator are 9 bits, and carriers are shifted BEFORE going to accumulator. With this we lose precision and get spare calculations: 4 shifts and 4 sums instead of 4 sums and 1 shift (algorithm 7).
I don't know why they used this method.
Regarding the PCM/DAC register, it is said the sample rate is 55.5KHz(for 8MHz master clock), but whenever I go past half it, I start getting missed writes which result in distortion/cracking/etc. on high freqs (i.e if you got 26KHz waveform and you skip a write every once in a while, you'll get shitty sound, especially if the write carried a peak value).
It's sample rate of every channel and thus, rate of getting output of 6th channel or byte $2A and sending it to DAC. I think THIS is what they meant.
How fast you can write to $2A is quite another story, and it strongly depends on specific console. One console let me writings at 32 kHz, while other - at 24 kHz.

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Post by Eke » Tue Sep 14, 2010 8:52 am

Thanks a lot !

This
The accumulator adds together and accumulates for each channel the output (9-bit) of each slot for each channel sent from the operator, and sends it to the D/A converter.
and this
However, in the case of the OPN2C, the internal D/A converter is nine (9)-bit, so the actual analog audio output becomes equivalent to fifty-four (54) dB. Therefore, compared to the OPN, even if the exact same parameters are set, there are cases where the analog sound output will overflow entirely.
are interesting.

This would mean that not only the output of channel is limited from 14 to 9 bits but also the output of each of the 4 slots that makes a channel... and that overflow can occur is surprising: as I understand it, it means that in case of algorithm 7 for example, the sum of the four 9-bit operators output is masked and a large attenuation can become a lower attenuation ?

I'm not sure how they ended with the 54dB value though.

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Post by TmEE co.(TM) » Tue Sep 14, 2010 9:13 am

9 * 6 = 54 :P

each bit is 6db
GManiac wrote:How fast you can write to $2A is quite another story, and it strongly depends on specific console. One console let me writings at 32 kHz, while other - at 24 kHz.
You get those rates when you wait for the ready bit ? I have so far got only ~33KHz form MD2 and my MD1s by doing the busy wait before sending in a sample
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Post by GManiac » Tue Sep 14, 2010 11:34 am

This would mean that not only the output of channel is limited from 14 to 9 bits but also the output of each of the 4 slots that makes a channel... and that overflow can occur is surprising: as I understand it, it means that in case of algorithm 7 for example, the sum of the four 9-bit operators output is masked and a large attenuation can become a lower attenuation ?
Operator is arithmetically shifted by 5 bits, result sums with accumulator. One operator can give you values from -256 to +255. Using one more operator you can get +256, I know it sounds strange. Range of accumulator or DAC is -256..+256 and you cannnot get values out of this range. There is no "overflow", high values won't become small values.
You get those rates when you wait for the ready bit ?
Yes. In other case I should lose samples.

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Post by TmEE co.(TM) » Tue Sep 14, 2010 8:30 pm

So there's some different kind of YM chips around.....

When I wait for the flag, I get 33KHz, with lot of missed writes, just boost up highs in some test tune and you'll hear how crappy stuff close to 13KHz and above gets... and its no way caused by playback code or analog stages after the YM.
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Post by Eke » Sun Sep 19, 2010 3:03 pm

Some additional notes from the romhackingboard (huge thanks to the translators there)
Points of note on OPN2C data conversion-time

The YM3438 (OPN2C), due to the use of YM2203 (OPN) and YM2608 (OPNA) software, can drive 3ch or even 6ch audio output. However, due to the characteristics of the OPN2C, there are also cases in which it cannot drive audio, like the OPN2.

However, even though the the OPN2 and OPN2C can drive software made for OPN and OPNA, there are cases in which they cannot attain the same tone [i.e. sound characteristics] as the OPN and OPNA. Because the D/A converter’s dynamic range is limited to nine (9) bits, this can cause the output waveform to overflow unintentionally depending on the values set for tone parameters.

In order to avoid this, it is necessary to adjust the “total level” in the tone parameters so as to not distort the output waveform.

Also, even when performing sound production using the OPN or OPN2C, it is necessary to take caution.


In this manner, the tone data between the OPN2/OPN2C and OPN/OPNA are not 100% compatible. Accordingly, the standards when creating OPN2 or OPN2C tone data based on that of the OPN, OPNA, and YM2610 (OPNB) are listed below. This is the same even when using the OPN2/OPN2C to perform sound production.

① Confirm the connection (algorithm) data. If these data are zero (0) through three (3), then the waveform does not distort, even at TL=0.

② When con. = 4, set the TL of the second individual carrier so that it will be negative six (-6) [dB] or more.

③ When con. = 5 or 6, set the TL of the third individual carrier so that it will be negative nine and one half (-9.5) [dB] or more.

④ When con. = 7, set all TL’s to negative twelve (-12) or more.
It is related to how channel's slots are summed to compute 9-bits DAC input, not sure how to interpret that though.

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Post by Stef » Tue Sep 21, 2010 11:41 am

The guy said "this can cause the output waveform to overflow unintentionally ...", well i guess he meant the waveform can be limited. I think there is a limiter after the sum so it can fit in 9 bits (without limiter it would sound completly trashy in case of overflow).

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Post by Eke » Wed Sep 22, 2010 3:50 pm

Gmaniac wrote:Operator is arithmetically shifted by 5 bits, result sums with accumulator. One operator can give you values from -256 to +255. Using one more operator you can get +256, I know it sounds strange. Range of accumulator or DAC is -256..+256 and you cannnot get values out of this range. There is no "overflow", high values won't become small values.
Stef wrote:The guy said "this can cause the output waveform to overflow unintentionally ...", well i guess he meant the waveform can be limited. I think there is a limiter after the sum so it can fit in 9 bits (without limiter it would sound completly trashy in case of overflow).
so basically, the process would be, for each channel:

1/ convert 14-bit slot output to 9-bit using simple 5-bit shifter (maybe it's more complicate, seeing how14-bit output is converted to 10-bit modulation input)
2/ add each slot output (up to four slots per channel)
3/ limits the result to -256;+256


?

@GManiac: may I ask you how you ended up to that conclusions ?

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Post by GManiac » Wed Sep 22, 2010 5:13 pm

I made a tons of tests on real MD to get understanding for myself how YM really works. Information which I could read (MAME's source, YM2608 manual, posts by Nemesis) didn't give me the "whole picture" of understanding. And of course oscillograms will tell more than cold numbers and C source.
All of these tests I made 1 year ago and even wrote emulator, but then leaved all this job and it is still in unfinished state :(

Now I'm trying to write an articles about PSG and YM (in Russian), they will fully explain how chips work (info is based on my tests of course) and will consist of some "layers": entry level, detailed description, full description with tests and examples.

Back to DAC. I made such test:
algo 7, all operators are at +1 of sinus, all TL = $7f, freq = 0, so we have silence. Having prevoius knowledge:
- operator's output is -8168..+8168
- each 8 steps of TL are equal to 6 dB (division by 2)
and adjusting separate TL I realized that:
- operators are shifted first, then are summed
- operators are shifted arithmetically (not logically) by 5 bits
- levels -1 and -2 of DAC are the same. I mean that if you change output from -1 to -2 you won't notice difference on oscillogram. I know it's very strange, but it's true.
- AFAIR, there is level +256, and you can get it summing 2 or more operators, you can't reach it using only 1 operator. Calculations:
+8168 asr 5 = +255
-8168 asr 5 = -256
Setting one operator to +255 and adjusting TL of other operator I found that maximum is +256.
So we have 513 levels, but maybe here is how equality of -1 and -2 affects final output and we have only 512 uniqie levels? I don't know.


I need to revive my work on YM.

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Post by HardWareMan » Fri Mar 18, 2011 3:09 pm

New records from Yamaha. Even Regen is not capable of such accuracy of emulation. Note the abundant presence of the ladder effect in all of decaying sounds.

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Post by TmEE co.(TM) » Fri Mar 18, 2011 4:18 pm

ASIC YM has this effect definitely not present in its output. A while ago l_oliveira put a YM3438 into his MD1 (output is lower impedance on it so analog things had to be adjusted on MD side) and it has same problem in its output, which means ASIC YM is not based on it.
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Post by GManiac » Fri Mar 18, 2011 8:11 pm

Question. Has MD2 REALLY higher precision DAC (>9 bits ) or not?
TmEE co.(TM), can you make a test?
Algo 7, TL about $3F, sine wave of any operator.
Explanation: TL $40 = attenuation of 256 times. So, output of operator will be from -31 to +31.
-31 asr 5 = -1
31 asr 5 = 0
Playing this sine wave on YM you'll see:
-1 0 0 0 -1 0 0 0 -1 0 0 0 -1 0 0 0

TL $3F = attenuation of 2^7.875 = 234.75 times, output of operator will be from -34 to +34 and output of DAC will be from -2 to +1 and you'll see
-2 -1 0 +1 0 -1 -2 -1 0 +1
In fact you won't see -2 because of glitch in DAC, I wrote earlier about it.

These calculations are fro 9-bit DAC. I made them "in mind", so there can be mistake. If MD2's DAC is more prceise, you'll see more precise ladder of sine wave.

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Post by TmEE co.(TM) » Fri Mar 18, 2011 9:38 pm

This is what I got with the settings you provided :

Image

There seems to be -2, -1, 0 and +1 here. So even if there is none of higher percision DAC, there's no glitch that eats up few values.

I'd do more tests but right now my girl waits me to come to bed... :wink:
Need to remove the caps from my sound card input...

EDIT: Tried TL of 71 this morning and there seems to be 2 values left, alternating rapidly.
No 9-bit DAC, but no glitch either...
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