I don't have this chips. Sorry. I'm waiting for the completion of photography clones YM2612: TA-07 and SE-95.TmEE co.(TM) wrote:What I want to see is 315-5478 / 5660 / 5700 / 5708 to finally settle why it has the least noisy output, plus the other tidbits that fix trailing noises and other oddities that only happen on YM2612 and not on YM3438...
New Documentation: An authoritative reference on the YM2612
Moderator: BigEvilCorporation
-
- Very interested
- Posts: 745
- Joined: Sat Dec 15, 2007 7:49 am
- Location: Kazakhstan, Pavlodar
-
- Very interested
- Posts: 2440
- Joined: Tue Dec 05, 2006 1:37 pm
- Location: Estonia, Rapla City
- Contact:
I can donate :
315-5750 (SVP, failed due to static electricity)
315-5960 (MD2 VA4, Genny3 VA0/VA1 ASIC)
YM3438 (a fake chip, made in 2000something but works perfectly)
315-5660 (MD2 VA0/1/3)
315-5750 (SVP, failed due to static electricity)
315-5960 (MD2 VA4, Genny3 VA0/VA1 ASIC)
YM3438 (a fake chip, made in 2000something but works perfectly)
315-5660 (MD2 VA0/1/3)
Mida sa loed ? Nagunii aru ei saa
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
Now, let's not open the floodgates just yet. As I understand it, decapping takes significant work, very expensive hardware, and it is a dangerous process.
I too have a few Sega chips I want to see decapped, that I am willing to send for zero charge, but they are only borderline related to the Megadrive. So first I must ask if it is even possible, how much would it cost, how many do you have the capacity and time to do, would the chips still work after decapping & photographing, and such things.
I too have a few Sega chips I want to see decapped, that I am willing to send for zero charge, but they are only borderline related to the Megadrive. So first I must ask if it is even possible, how much would it cost, how many do you have the capacity and time to do, would the chips still work after decapping & photographing, and such things.
-
- Very interested
- Posts: 2440
- Joined: Tue Dec 05, 2006 1:37 pm
- Location: Estonia, Rapla City
- Contact:
There is one thing I am wondering... perhaps the DAC is a simplified Yamaha floating point DAC ?
Normal format for them is 3 bit exponent and 10 bit mantissa.
The DAC seems to be made of 2 parts, and one of the parts does have 3 lines coming into it... ?
Normal format for them is 3 bit exponent and 10 bit mantissa.
The DAC seems to be made of 2 parts, and one of the parts does have 3 lines coming into it... ?
Mida sa loed ? Nagunii aru ei saa
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
I don't think so. With what little I understand of IC design logic at this stage, it seems to me that what's happening is that they're splitting the upper 3 bits and the lower 5 bits of the value so that they can construct an array. You'll see there are three separate parts to that circuit, with an upper section that has 3 lines going into it and 8 lines going out, and a lower part with 5 lines going into it and 32 lines going out. I'm guessing these sections are "decoders" of sorts, which will take in effectively a binary value, and assert only a single output line indicating the decoded value. IE, 2^3=8, and 2^5=32, which is why there are 8 output lines for the upper part, and 32 output lines for the lower part, one for each value respectively. Those output lines then get fed into some kind of logic array which is 8x32, with 256 entries. A single entry gets triggered, which is the point at which the two asserted lines intersect. If I was to guess, I'd say this is effectively an array of resistors, each one having a different resistance, so that each entry on the table produces a different output current based on the 8-bit digital input. A very simple, neat DAC.
All that said, this array is just an array of entries. I don't know if there's any way to tell from looking at this 8x32 array what the "value" of each entry is. If there isn't, there's no way to know how the 8-bit input data is encoded without tracing it back further up the circuit. Since the operator unit produces a simple binary output though, I don't think they would have encoded it as floating point to pass to the DAC, since the DAC decode table could just as easily work with floating point or raw binary data, depending on the resistance values for each entry.
All that said, this array is just an array of entries. I don't know if there's any way to tell from looking at this 8x32 array what the "value" of each entry is. If there isn't, there's no way to know how the 8-bit input data is encoded without tracing it back further up the circuit. Since the operator unit produces a simple binary output though, I don't think they would have encoded it as floating point to pass to the DAC, since the DAC decode table could just as easily work with floating point or raw binary data, depending on the resistance values for each entry.
I should add, I'm not really sure from looking at the circuit if the DAC really is 9-bit or 8-bit. It looks like 9 data lines come up to the DAC, but one of them gets whisked away and I can't quite figure out what happens to it. At a guess, I'd say it's really a 9-bit DAC, but one of those is the sign bit, so it gets applied later on, after the remaining 8 bits have been run through the ADC conversion table.
-
- Very interested
- Posts: 745
- Joined: Sat Dec 15, 2007 7:49 am
- Location: Kazakhstan, Pavlodar
You totally right! Analog value matrix is 8x32 (256 levels). 9th bit is a sign.
Sign bit conect DAC matrix to AVCC or AGND via Source/Sink power switches. That is why between two samples on MOL/MOR are 1/2 of AVCC. Thus, 8bit DAC pulls up to the AVCC or pulls down to the AGND which depends on 9th sign bit. Whoah.
Sign bit conect DAC matrix to AVCC or AGND via Source/Sink power switches. That is why between two samples on MOL/MOR are 1/2 of AVCC. Thus, 8bit DAC pulls up to the AVCC or pulls down to the AGND which depends on 9th sign bit. Whoah.
Last edited by HardWareMan on Mon Apr 16, 2012 9:38 am, edited 1 time in total.
-
- Very interested
- Posts: 2440
- Joined: Tue Dec 05, 2006 1:37 pm
- Location: Estonia, Rapla City
- Contact:
That is very neat !
Mida sa loed ? Nagunii aru ei saa
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
http://www.tmeeco.eu
Files of all broken links and images of mine are found here : http://www.tmeeco.eu/FileDen
-
- Very interested
- Posts: 745
- Joined: Sat Dec 15, 2007 7:49 am
- Location: Kazakhstan, Pavlodar
Actually, since reading this topic:
viewtopic.php?t=1118
I've been thinking the upper 2 bits in the DAC test register at $2C could very well be the same as the upper 2 bits in the FM test register, namely, they might allow the digital data being fed into the DAC to be read from the status register, so maybe that circuit is for reading the internal 9-bit DAC value out? It's also possible one of the other bits in that test register allows a full 9-bit DAC value for channel 6 to be set somehow, IE, maybe bit 0 is the LSB of the 9-bit DAC value?
viewtopic.php?t=1118
I've been thinking the upper 2 bits in the DAC test register at $2C could very well be the same as the upper 2 bits in the FM test register, namely, they might allow the digital data being fed into the DAC to be read from the status register, so maybe that circuit is for reading the internal 9-bit DAC value out? It's also possible one of the other bits in that test register allows a full 9-bit DAC value for channel 6 to be set somehow, IE, maybe bit 0 is the LSB of the 9-bit DAC value?
I am quite impressed by the way you guys are able to follow those "tracks" and figure what kind of component they are connected to
Has this already been figured how the 9-bit DAC source was generated from 14-bit operator output ? What is the 9-bit DAC source register purpose ?
EDIT: well, I can answer the latter myself at least, it seems to be a "temporary" storage for the DAC source, I noticed that there were "inputs" and "outputs" connected through those registers (one per bit and per stereo channel,, 18 in total). I'd never have thought that a "simple" register would have been so much complex electronic though !
Has this already been figured how the 9-bit DAC source was generated from 14-bit operator output ? What is the 9-bit DAC source register purpose ?
EDIT: well, I can answer the latter myself at least, it seems to be a "temporary" storage for the DAC source, I noticed that there were "inputs" and "outputs" connected through those registers (one per bit and per stereo channel,, 18 in total). I'd never have thought that a "simple" register would have been so much complex electronic though !
-
- Very interested
- Posts: 745
- Joined: Sat Dec 15, 2007 7:49 am
- Location: Kazakhstan, Pavlodar
-
- Interested
- Posts: 32
- Joined: Mon Apr 06, 2009 4:17 pm
- Location: Hiroshima, Japan
Keep up the good work, guys
I don't really have any insights to contribute here, but I'd just like to say thanks to you guys for going through all the effort to decap and analyze the circuitry of the YM2612. I've had a weird interest in this chip ever since I started working on vgm2mid (anyone here remember that program?), and it makes me happy to know that I'm not the only one curious to find out what makes it tick.
Also, does anybody have any links to good resources for learning how to read IC schematics? Looking at all the photos of the YM2612 has made me want to be able to analyze these circuits for myself.
Also, does anybody have any links to good resources for learning how to read IC schematics? Looking at all the photos of the YM2612 has made me want to be able to analyze these circuits for myself.