Some noob question about VDP

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tryphon
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Some noob question about VDP

Post by tryphon » Fri Aug 23, 2013 10:15 am

Hi,

I'm currently trying to understand how the game Shadow Dancer works (to study the feasability of an arcade Shinobi remake).

It's the first Genesis game I look into, and I understand slowly a few things.

I have an eye on a piece of code that sends the following values to the VDP Controller :

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93309400 950096D3 977F7400 0083
If I understood correctely, this sets the VDP registers as follows :

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R19 = $30
R20 = $00
R21 = $00
R22 = $D3
R23 = $7F
The 74000083 means CDx = 100001 (DMA opération, copy from 68000 memory to VRAM) and Axx = $F400 (copy to VRAM address $F400, i.e. tile $7A0).

From some document, I read :
Registers 21, 22, 23 specify the source address on the 68000 side:

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 #21: S08 S07 S06 S05 S04 S03 S02 S01
 #22: S16 S15 S14 S13 S12 S11 S10 S09
 #23:  0  S23 S22 S21 S20 S19 S18 S17
It seems incoherent to me : with bit 23 always set to 0, it'd be impossible to access RAM. So, either bit23 is always set to 1, or the preceding address must be shifted to the left one time (that is, multiplied by 2).

Here the source address would be $7FD300. So, by my assumptions, either $FFD300, or $FFA600.

After viewing the RAM, it seems that's the latter, but I'd like to have a confirmation (or a correction, in case I misunderstood or miscomputed something).

Thanks :)

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HardWareMan
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Post by HardWareMan » Fri Aug 23, 2013 4:29 pm

Have you already read the good old Sega Tech?

tryphon
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Post by tryphon » Fri Aug 23, 2013 5:05 pm

No. I had already given it an eye, and like most 'official' technical documents, they are unreadable if you don't already know what they are about, which is my case :)

Chilly Willy
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Post by Chilly Willy » Fri Aug 23, 2013 5:55 pm

Did you REALLY look at the address fields?

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 #21: S08 S07 S06 S05 S04 S03 S02 S01
 #22: S16 S15 S14 S13 S12 S11 S10 S09
 #23:  0  S23 S22 S21 S20 S19 S18 S17
Notice it says S1 to S23, not S0 to S22. That is A1 to A23 - the normal word address the 68000 uses. When converting the address for the registers, you just shift it right one bit. When converting the register contents to an address, you shift it left one. Every DMA example shows this behavior. You just missed it somehow. :wink: :lol:

tryphon
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Post by tryphon » Fri Aug 23, 2013 8:37 pm

Yes, I RRRRREEEEEEAAAAAALLLLLLLLLLLLLLLLYYYYYYY looked at it. Too quickly though 8)

Thanks, that explains everything :)

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