M68K Bus Control and Vdp
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M68K Bus Control and Vdp
I have a question about the vdp/68K connection.
The VDP is connected to UDS/LDS signal from the 68K.
What the consequence for the vdp internally, for example, of reading upper byte (UDS = 0, LDS = 1) of Control/Data or HVC Counter?
Does the VDP return only upper byte on the D15-D8 data line and doesn't set the D7-D0 line?
The VDP is connected to UDS/LDS signal from the 68K.
What the consequence for the vdp internally, for example, of reading upper byte (UDS = 0, LDS = 1) of Control/Data or HVC Counter?
Does the VDP return only upper byte on the D15-D8 data line and doesn't set the D7-D0 line?
Re: M68K Bus Control and Vdp
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Re: M68K Bus Control and Vdp
Is this the way i emulate my vdp access :
Let's take an example of reading upper byte from Control data port from the 68K side (<=> readByte from the even adress)
Whatever UDS/LDS, the VDP will returns the control port fully on the data line.
Is this the behavior of the real hardware?
All this things is not very important but i want my code design reflect the real hardware.
Code: Select all
u32 Vdp::readWord(u32 adress, u32 ctrl)
The method return D15-D0 lines (Word)
U32 adress : A24-A1 lines adress (A0 is bit 0 but is ignored)
u32 ctrl : Bit 0 : LDS, Bit 1 : UDS
Code: Select all
data = vdp->readWord(0xC00004, UDS); /* UDS = 1 (Bit 0 = 1 (LDS High, UDS Low)) */
data = data >> 8;
Is this the behavior of the real hardware?
All this things is not very important but i want my code design reflect the real hardware.
Re: M68K Bus Control and Vdp
HELP. Spanish TVs are brain washing people to be hostile to me.
Re: M68K Bus Control and Vdp
From my point of view when uds is selected the 68k put the upper byte of data bus into lower byte of register.
Re: M68K Bus Control and Vdp
Which register are you talking about, vdp register or cpu register?
HELP. Spanish TVs are brain washing people to be hostile to me.
Re: M68K Bus Control and Vdp
I'm talking about the cpu register.
When you do read access with upper byte the cpu take the upper byte (D15-D8) from the bus and put this byte into lower byte of register.
Now, at the contrary, what happen if you do write access to vdp control port with
- UDS selected (<=> write byte at even adress)?
- LDS selected (<=> write byte at odd adress)?
When you do read access with upper byte the cpu take the upper byte (D15-D8) from the bus and put this byte into lower byte of register.
Now, at the contrary, what happen if you do write access to vdp control port with
- UDS selected (<=> write byte at even adress)?
- LDS selected (<=> write byte at odd adress)?
Re: M68K Bus Control and Vdp
HELP. Spanish TVs are brain washing people to be hostile to me.
Re: M68K Bus Control and Vdp
From Genesis Plus GX Source :
I understand (if it's correct) that doing byte is only valid at even adress and is equivalent of doing word access with lower byte duplicated into upper byte.
My first question : It's correct?
Second Question : if it's correct what is the cause? Does the 68K duplicate lower byte when doing byte access at odd adress (And Why not duplicate upper byte when doing byte access at even address ...)?
Code: Select all
void vdp_write_byte(unsigned int address, unsigned int data)
{
switch (address & 0xFC)
{
case 0x00: /* Data port */
{
vdp_68k_data_w(data << 8 | data);
return;
}
case 0x04: /* Control port */
{
vdp_68k_ctrl_w(data << 8 | data);
return;
}
case 0x10: /* PSG */
case 0x14:
{
if (address & 1)
{
psg_write(m68k.cycles, data);
return;
}
m68k_unused_8_w(address, data);
return;
}
My first question : It's correct?
Second Question : if it's correct what is the cause? Does the 68K duplicate lower byte when doing byte access at odd adress (And Why not duplicate upper byte when doing byte access at even address ...)?
Re: M68K Bus Control and Vdp
HELP. Spanish TVs are brain washing people to be hostile to me.
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Re: M68K Bus Control and Vdp
68K duplicates high and lwo bytes during 8bit writes (i.e $12 is $1212 on the bus). Reads are aways 16bit and CPU internally chooses which half to use depending on address.
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Re: M68K Bus Control and Vdp
That make sens.TmEE co.(TM) wrote: ↑Mon Dec 09, 2019 10:29 pm68K duplicates high and lwo bytes during 8bit writes (i.e $12 is $1212 on the bus). Reads are aways 16bit and CPU internally chooses which half to use depending on address.
From design code point of view this behavior have to be in my 68K core code, not in my vdp code.
Code: Select all
if (addr & 1) 68Kbus->write((data << 8) | data), LDS)
if (addr & 1) 68Kbus->write((data << 8) | data), UDS)
Re: M68K Bus Control and Vdp
mickagame wrote: ↑Tue Dec 10, 2019 6:22 amThat make sens.TmEE co.(TM) wrote: ↑Mon Dec 09, 2019 10:29 pm68K duplicates high and lwo bytes during 8bit writes (i.e $12 is $1212 on the bus). Reads are aways 16bit and CPU internally chooses which half to use depending on address.
From design code point of view this behavior have to be in my 68K core code, not in my vdp code.
Code: Select all
if (addr & 1) 68Kbus->write((data << 8) | data), LDS) else 68Kbus->write((data << 8) | data), UDS)
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Re: M68K Bus Control and Vdp
Remember that it needs to support byte access so the Z80 can talk to it a byte a time in SMS mode.
Re: M68K Bus Control and Vdp
Another question about accessing Z80 space from 68K side :
From what i understand :
- If UDS selected byte will be read at even adress from Z80 bus (addr + 0) and will be returned at upper byte from 68K Bus (D15-D8)
- If LDS selected byte will be read at even adress from Z80 bus (addr + 1) and will be returned at lower byte from 68K Bus (D7-D0)
It's correct way to understand?
In this case, when UDS AND LDS are selected (Word Access) the system need to perform 2 bytes operations on Z80 bus before 68K can take the datas on the bus?
From what i understand :
- If UDS selected byte will be read at even adress from Z80 bus (addr + 0) and will be returned at upper byte from 68K Bus (D15-D8)
- If LDS selected byte will be read at even adress from Z80 bus (addr + 1) and will be returned at lower byte from 68K Bus (D7-D0)
It's correct way to understand?
In this case, when UDS AND LDS are selected (Word Access) the system need to perform 2 bytes operations on Z80 bus before 68K can take the datas on the bus?