Pico and Copera Info

[Mask of Destiny]

I've been working on Sega Pico and Yamaha Copera (a Pico enhanced with some additional audio hardware) emulation recently. I figured it would be good to write up my findings. I'd like to start by thanking notaz for their existing Pico document, superctr for providing an archive of some Sega Pico sound driver code and for pointing me the right direction on YMZ263B ADPCM and Jorge for some investigation of interrupt behavior on an Genesis 3 VA2 in "Pico mode".

This is preliminary work based on analysis of software, existing documentation and readily available photographs. Once I get some hardware in, I intend to do some tests to further fill in the blanks. There is a bit of informed speculation here currently, I'll try to make note of these.

Memory Map:
000000 - 1FFFFF: First cartridge chip select (pin 22)
200000 - 3FFFFF: Second cartridge chip select (pin 47, speculation based on photos of 32 Mbit carts and carts with extra hardware at the 2MB mark)
800001: Version
800003: Button State
800005: Pen X MSB and pen detect bit (pen detect is speculation, see below)
800007: Pen X LSB
800009: Pen Y MSB and pen detect bit (see note below
80000B: Pen Y LSB
80000D: Storyware page sensor
80000F: Pico/Copera system type detect bit 0 is 0 on Copera and 1 on Pico
800010: ADPCM data port
800012: ADPCM control port
800015: MD style IO - data port (DE-9 connector only present on Copera and early Pico models, somewhat speculative)
800017: MD style IO - control port (same as above)
800019: Pico TMSS
80001B: Pico TMSS
80001D: Pico TMSS
80001F: Pico TMSS
C00000 - FFFFFF: Same as MD

A lot of this was already covered by notaz so I'll mostly comment on the new stuff.

For the pen position registers, it seems that the most-significant bit is possibly used to determine whether the pen is detected at all. Some games seem to check this bit and behave differently when it's set. Since the position of the Pico pen can be determined even when the user is not pressing down, it stands to reason that there is a way to detect the pens' absence.

I'm basing Pico/Copera system type register based on the behavior of Copera software. All of these titles check bit 0 of this register. If it's 1 they display a message notifying the user that the software is not compatible with a Pico and if it's 0 they instead show the Copera logo screen.

For the MD style IO port, I'm largely basing this on the behavior of a Samsung Pico title: Biouneun Nal (aka The Rainy Day). It has access patterns to these addresses that match what you would expect for a 3-button MD controller routine. The port is known to exist on the HPC-0001 and Copera models. Early HPC-0003 Picos still have the pads for the DE-9 on the PCB, but the connector is not populated.

Copera Extra Memory Map
BFF801: YMZ263B Status read/address write (no Copera games write to this address, but it should work based on the YMZ263B datasheet)
BFF803: YMZ263B Channel #1 data
BFF805: YMZ263B Address write
BFF807: YMZ263B Channel #2 data
BFF824: YMF262 Address Part #1 write/Status read
BFF828: YMF262 Data write
BFF834: YMF262 Address Part #2 write
BFF840: YM712B write

For BFF840, it looks like the CPU has to bitbang the serial protocol these chips use and that both chips are written simulatenously. The mapping of bits to YM712B pins appears to be as follows:
7: unused, games always write 1
6: A0
5: DIN
4: SCI
3: unused, games always write 1
2: A0
1: DIN
0: SCI
Bits 4-6 are for one chip and 0-3 for the other. I don't know where these chips are hooked up in the audio path yet so I can't really say which is which. Emulating these is not necessary to get games to run, though obviously they're needed for proper sound.

Pico ADPCM
The Pico's ADPCM chip seems to be based on the uPD7759, but the frontend and pinout are quite different. It also seems to run at twice the clock speed. It adds the following features over the base uPD7759:
- 64-byte (or maybe 63?) FIFO
- Selectable low-pass filter (6 kHz, 12 kHz or 16 kHz based on comments from Sega's driver)
- 3-bit volume

The chip sits directly on the 68K's bus, but seems to rely on the IO chip to handle address decoding. The bits of the control port are as follows
15: Write 1 to reset, read returns BUSY status (i.e. is the chip currently playing a sample)
14: Interrupt enable. Level 3 interrupts will trigger based on FIFO fullness when set, they will not when clear
13-12: ?
11: Sega driver always sets this bit outside of reset, but some games expect ADPCM to work with it clear.
10-8: ?
7-6: Filter selection, 11 = 16 kHz, 10 = 12 kHz, 01 = 6 kHz, 00 = ??
5-3: ?
2-0: Volume

Some games do write stuff to the unknown bits, but it's unclear what they do. It's possible some of the bits are used to select the FIFO threshold for interrupts, but it's hard to say without hardware testing. Data format is basically the same as uPD7759 in slave mode except without the dummy bytes so the first byte you encounter is a command byte (i.e. either delay or sample command).

Interrupts
6: VDP vertical interrupt
5: VDP horizontal interrupt (confirmed on Gen3 VA2 in "Pico mode")
4: VDP external interrupt (completely speculative)
3: Pico ADPCM interrupt
2: YMZ263B interrupt (Copera only)

The main new info here is that it appears the VDP interrupts are shifted upwards and that the Copera uses the level 2 interrupt for the YMZ263B "MMA" chip. Implementing the timer, MIDI and PCM FIFO interrupts are generally needed for Copera games to function properly.