Memory Chip Design

For hardware talk only (please avoid ROM dumper stuff)
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Memory Chip Design

Post by MERLiX » Fri Jun 22, 2012 8:30 pm

So I have weird ideas from time to time.

I was thinking wouldn't be cool to have hardware compression on the genesis.

Question is what is the bus speed, and how fast would a chip need to feed data?

This chip pretty much would act as a memory controller, the 1st Mega Byte would just pass through regularly. Higher areas of memory would be handled as compressed data. So you could actually have more than 4 meg decompressed memory available.

You could do something like read/write to this location to set which set of data you want, then do a DMA transfer to pull the actual data.

The chip itself wouldn't need much RAM, like 4 or 8kb depending dictionary size etc. But the cpu speed would matter, and would probably need a sperate crystal.

I dont know if its even futile, maybe the genny is good enough to handle it all in software. But I thought it would be an interesting thing to tinker with. You could really do some smooth animation, by DMAing sprite information quickly, plus you get the added benefit of more space to store graphics.

Anyways, ramblings of an old man.

Very interested
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Location: Russia, Moscow

Post by Shiru » Fri Jun 22, 2012 10:04 pm

Why would you need to compress anything these days, when you can get a 8GB Flash for $5? I think decompresion hardware will costs more than this.

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