Search found 885 matches
- Fri Jan 18, 2008 9:11 am
- Forum: Video Display Processor
- Topic: VDP registers timings
- Replies: 34
- Views: 40227
I assume it was either an error in the original docs, or an OCR error when someone converted the original docs. Look where it says 100 dots -> 860 mclks. Possibly an OCR error converting a 0 into a 6. That's the same error you see in the 76 -> 668. It should be 608, so I'd guess yet another 0 conve...
- Thu Jan 17, 2008 10:08 am
- Forum: Video Display Processor
- Topic: VDP registers timings
- Replies: 34
- Views: 40227
I found this in 32x docs (always nice to learn new things ;) ) http://gxdev.wordpress.com/files/2008/01/32x_vdp_hblank.gif http://gxdev.wordpress.com/files/2008/01/32x_vdp.gif I guess the same thing could also apply to the Genesis VDP (they use the same clock I think) note that it seems some values ...
- Thu Jan 17, 2008 9:50 am
- Forum: Announcement
- Topic: Tavern RPG Official Launch
- Replies: 30
- Views: 54618
Wow, the new website rocks
http://www.piersolar.com/
Pier Solar & the Great Architects , this title has something promising in it
Looks very professional
http://www.piersolar.com/
Pier Solar & the Great Architects , this title has something promising in it
Looks very professional
- Sat Jan 05, 2008 12:09 pm
- Forum: Demos
- Topic: My first demo: a 64 color image
- Replies: 21
- Views: 21302
Biggest problem is that in order to avoid artifacts you need to turn the display off during HBLANK and the only way to do that and still have enough time to DMA 8 colors is to poll the status register for HBLANK. HINTs occur too late. So you basically end up burning 100% of your CPU time on the col...
- Tue Dec 18, 2007 8:58 am
- Forum: Megadrive/Genesis
- Topic: Genesis Address Bus and Max RAM
- Replies: 35
- Views: 41152
No. Why should I do that? It's simple separated TV sync signals. PS I made a device, that generate DTACK, when it not activate in 8 VCLK cycles. You can see it here (add-on in center). One binary counter and simple logic IC. To know the exact cycle count (exprimed in pixel and 68k clocks) for one s...
- Sun Dec 16, 2007 4:53 pm
- Forum: Megadrive/Genesis
- Topic: Genesis Address Bus and Max RAM
- Replies: 35
- Views: 41152
In the experiments, we get this memory map. Names for signals got from known pictures (Mega01.gif and Mega01.gif). http://img509.imageshack.us/img509/7231/segamapnq0.th.gif Hey excellent work, any chance of probing DTACK activation and number of clk cycles after AS? (speed check) :wink: !DTACK not ...
- Sun Dec 09, 2007 7:42 pm
- Forum: Tools
- Topic: IDA 5.1 PC-relative addressing fix
- Replies: 3
- Views: 6653
- Tue Dec 04, 2007 2:49 pm
- Forum: Video Display Processor
- Topic: VDP registers timings
- Replies: 34
- Views: 40227
In fact, the question came from disassembling the game "Legend of Galahad" because I noticed a single line glitch on emulator when playing the intro http://gxdev.wordpress.com/files/2007/12/galahad.gif Here, HINT is set to occur at line 176 (and by this I mean AFTER line 175 has been scanned) and th...
- Tue Dec 04, 2007 10:35 am
- Forum: Video Display Processor
- Topic: VDP registers timings
- Replies: 34
- Views: 40227
VDP registers timings
Does someone know what happen if display is disabled during line scanning period (clearing VDP register 01 bit 6) ? Is the current displayed line blanked or does this register setting won't apply until next scanline ? Another question would be: for a given H interrupt, occuring after line N renderin...
- Fri Oct 26, 2007 12:44 pm
- Forum: Megadrive/Genesis
- Topic: Random numbers generation
- Replies: 20
- Views: 17445
I think that the issue with soft-reset comes from the fact that, on emulators, "soft reset key" input is handled like any other inputs, i.e at the end (or start) of each frame... so the cpu reset can never occur in a middle of a frame and HV counters are always the same since they are reseted at the...
- Tue Oct 23, 2007 7:54 am
- Forum: Sound
- Topic: Notes on YM2612
- Replies: 26
- Views: 22057
Charles Mac Donald once said he measured the timer frequency: http://www.smspower.org/forums/viewtopic.php?p=46944 In Genesis Plus, he uses the following formulas: void sound_init(void) { /* Timers run at half the YM2612 input clock */ float clock = ((MCLK / 7) / 2); int i; /* Make Timer A table */ ...
- Thu Oct 18, 2007 2:25 pm
- Forum: Megadrive/Genesis
- Topic: Random numbers generation
- Replies: 20
- Views: 17445
- Thu Oct 18, 2007 2:14 pm
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96425
I have no idea about how to simulate a "rolling screen" so I guess I would leave this unemulated for the moment :wink: ANyway, about the aspect raio: I just realized that the right number of "active" lines (including borders) ouputed by the VDP is 243 lines in NTSC, not 240. (288 in PAL) And that 32...
- Thu Oct 18, 2007 12:34 pm
- Forum: Megadrive/Genesis
- Topic: Random numbers generation
- Replies: 20
- Views: 17445
- Wed Oct 17, 2007 3:28 pm
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96425
For proper aspect, I'd recommend using a 352x240/288 buffer for H40 modes, and letting the GC scale to 640x480 (you'll see the border, but since the GC does overscan by default that is likely to be hidden). Render your Genesis display to the center 320x224/240 of said buffer (most released games us...