Ah shoot, so I was going down the wrong tangent looking at what was causing the trap when that was actually valid.
Okay, that helps, thank you very much. I will disassemble everything until the actual stall and see where that gets me to.
Search found 109 matches
- Sat Aug 24, 2019 1:46 pm
- Forum: Mega/SegaCD
- Topic: Popful Mail
- Replies: 16
- Views: 257997
- Sat Aug 24, 2019 1:58 am
- Forum: Mega/SegaCD
- Topic: Popful Mail
- Replies: 16
- Views: 257997
Popful Mail
Having a lot of trouble getting this game to boot. It's hanging at the Sega logo, pretty much immediately after the main CPU starts executing code that wasn't from the BIOS. It goes pretty quickly into a trap instruction, which I feel is a sign that things have gone off the rails immediately. Unfort...
- Thu Jun 27, 2019 2:30 pm
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Re: Designing a cooperative-threaded scheduler for an emulator
Definitely lots of good info from Nemesis here. On C++2a coroutines ... I am not sure how it might impact my design. It depends on whether or not they're stackless (if they are, then their scope is drastically limited to only the simplest of chips, like PSGs), and whether or not they're asynchronous...
- Tue Jun 18, 2019 3:54 pm
- Forum: Megadrive/Genesis
- Topic: Random emudev bugs list
- Replies: 1
- Views: 6496
Random emudev bugs list
Hope this is an okay topic ... I have a few pesky bugs in my emulator, and was curious if anyone else had similar issues, which might save me some time researching them. 1) Popful Mail hangs after the "Sega" boot splash screen. Both CPUs seem to be waiting for the other to say something. 2) Sonic CD...
- Mon Jun 17, 2019 12:59 pm
- Forum: Mega/SegaCD
- Topic: Documenting using the CD drive without the BIOS
- Replies: 5
- Views: 27106
Re: Documenting using the CD drive without the BIOS
0x0 is stopped. 0xb is no disc. The older information was more guesswork, whereas the newer information comes from a combination of the official PDF manuals and some source code to an emulation of the CDD (which is, at least for me, not comprehensible outside of the constants.) The CDD will pause on...
- Sat Jun 15, 2019 4:50 pm
- Forum: Mega/SegaCD
- Topic: Bike shedding a new CD-ROM format
- Replies: 20
- Views: 70214
Re: Bike shedding a new CD-ROM format
The idea is good, the format itself is terrible. I have to agree. Five major versions of it and counting (no attempt to cull older versions to reduce complexity), multiple compression algorithms (including gimmicks like RLE), SHA1 for some reason, a huge amount of code that's mostly tied into MAME ...
- Fri Jun 14, 2019 5:43 am
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Re: Designing a cooperative-threaded scheduler for an emulator
What you're describing is pretty close to what I'm doing, with a few key differences. Instead of a global array of timestamps, each class that inherits from Thread gets its own timestamp and support functions. There's a scheduler class that automatically keeps track of every thread in existence. You...
- Thu Jun 13, 2019 11:53 pm
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Re: Designing a cooperative-threaded scheduler for an emulator
I agree, but modern processor design is entirely incompatible with synchronizing threads more than a few hundred thousand times a second. That's not even enough for a good Atari 2600 or NES emulator. For PS2 and beyond, it's the only way to go, of course. Thankfully you don't need those to be cycle-...
- Thu Jun 13, 2019 7:03 am
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Re: Designing a cooperative-threaded scheduler for an emulator
General theory says you should make a difference between a thread and a workload: I'm really an oddball here. My threads are actual cooperative threads, each with their own stack frames. But there's no pre-emption. One threads runs until it needs state from another thread that's behind, and then it...
- Wed Jun 12, 2019 3:35 pm
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Re: Designing a cooperative-threaded scheduler for an emulator
Hey cool, take your time if you're busy. Whenever you're up for it, I'd love to have a more thorough discussion. I remember comparing my cooprerative approach to your preemptive approach in the past, but comparing the SNES to the Genesis was always rather imprecise anyway. And throwing in the Sega C...
- Wed Jun 12, 2019 8:52 am
- Forum: Megadrive/Genesis
- Topic: Designing a cooperative-threaded scheduler for an emulator
- Replies: 14
- Views: 31787
Designing a cooperative-threaded scheduler for an emulator
(Hope this is okay to post here, also posted to NESdev for more feedback.) I know I'm a bit of an outlier here with using cooperative-threading to design emulators, and that most will use state machines that run each chip the minimum amount of time, but I ran into a rather interesting challenge with...
- Sun Jun 09, 2019 2:36 pm
- Forum: Megadrive/Genesis
- Topic: 68K cycle timing test ROM?
- Replies: 11
- Views: 23162
Re: 68K cycle timing test ROM?
Slowly working through yacht still ... had to emulate the prefetch to make sense of JMP/JSR timings. The trick is JMP (d16,An) can peek ahead to IRC without having to fetch another byte, whereas JMP (An) has no use for it, hence why they're both 8(2/0). Question though: what is the purpose of IRD? h...
- Fri Jun 07, 2019 10:42 am
- Forum: Megadrive/Genesis
- Topic: 68K cycle timing test ROM?
- Replies: 11
- Views: 23162
Re: 68K cycle timing test ROM?
http://nemesis.hacking-cult.org/MegaDri ... /Yacht.txt
For whoever maintains this, there's a typo on line 579 for CLR <ea>.B/.W:
It should be 8(1/1) 12(3/0). One of the read cycles is missing.
For whoever maintains this, there's a typo on line 579 for CLR <ea>.B/.W:
Code: Select all
(xxx).L | 8(1/1) 12(2/0) | np np nr | np nw
- Wed Jun 05, 2019 12:27 pm
- Forum: Megadrive/Genesis
- Topic: 68K cycle timing test ROM?
- Replies: 11
- Views: 23162
Re: 68K cycle timing test ROM?
The RAM refresh does indeed sound like a challenge. At least on the SNES, the RAM refresh is predictable and easy to test instruction timings around it. I haven't looked into how to emulate the version on the Mega Drive yet. Perhaps we could use a timing test ROM for a 68K system that doesn't use DR...
- Tue Jun 04, 2019 9:52 am
- Forum: Mega/SegaCD
- Topic: Questions on writing a new Mega CD emulator
- Replies: 117
- Views: 7597944
Re: Questions on writing a new Mega CD emulator
Just for overkill, I thought it'd be fun to support the LC7883KM. I understand that I'm emulating a DAC when both the input and outputs from the emulation are digital, but this is just for fun. http://electronics-diy.com/pdf/LC7883.pdf The chip has pins for: * SOC1,SOC2 -> clock rate (384f, 448f, 39...