SpritesMind.Net

I ask on DevSter : http://devster.proboards22.com/index.cg ... 1170758649

We are a enthousiast squad, got it.
But seriously, Genny apart, what do you do in life ?

I'm 30 years old, married 1 daughter. I live in southern France. I work as an IT engineer for a retirement company, and gonna move in a transport compagny (CMA-CGM).

Wish list :
32X debug

as my mail states ;)

If I can help by any mean ...

OK, so I've done a little 32X ROM, with just the 68k running. Here's the code :
start68k:
move.l #$A15106,a0 ; DREQ Control Register
move.l #$A15112,a1 ; FIFO Register
move.w #4,(a0) ; CPU write (68k writes data in FIFO)
moveq #0,d1
whileFIFONotFull:
move.w (a0),d0
andi.w #$80,d0
bne ...

It's still the best and easiest way to exchange quickly small amount of data.
For small data, I agree. But what about bigger data ? Anyway, I think I understand how the FIFO runs. The DMA remais a bit unclear for now, but it's going to change soon ;)
Anyway, how big is the FIFO ? I've only found ...

Although I have real difficulties seeing my code running on the 32X (debugger, anyone ?), I have a silly idea in the head : a rendering library, let's call it GLide, for the 32X.

link : http://www.alasir.com/software/glide/index.html

The 68k would put data on the Comm Port, and each SH2 would poll ...

The Hardware Manual states that, once it (ADEN bit) has been set, further "change (is) not allowed".

I thought they were quite the same. Can't I do the same things ?

Let's suppose I want to draw a 165 pixels long red line, from pixel 48, the others being black.

With RLE :
2F00h, A401h, 6A00h
with palette :
00h : 0000h black
02h : 7C00h red

With FILL :
002Fh, 2000h, 0000h
00A4h, start address is ...

I was wondering what that FILL function was for ! I didn't see the use since the Run-Length is fine for continous pixels (if less than 255). FILL for clear, why not.

The doc states the FILL execution time is 7+3xlength, and the SH2 to DRAM execution time is 1-3 cycles. Is the FILL faster than ...

Just a little question.
The 32X has 2 frame buffer : FB0 and FB1. When FB0 is displayed, I can write to FB1. Calling the frame buffer swap, FB1 is displayed and I can write to FB0. But is this frame buffer emptied or does it still have previous data ?

eg :
FS = 0
I draw a red triangle.
FS = 1
I ...

Hi you all.
Still on 32x dev' ;)
I'm looking at the FIFO. First of all, is it usable ? Or is it DREQ only ?
The 68k writes to A1 5112h, and the SH2s read 2000 4012h. But is it a stack, a heap or anything ? And if so, how big is it ?
I mean, if the 68k want to put several datas, does it have to wait ...

For sure !
And by the way, use private RAM if the data is less than 2KB .
Enable 2-way cache (and thus, 2KB of private RAM) :
mov CCR,r0
mov #$19,r1
mov r1,@r0 ; Enable Cache, set 2-way, and purge

CCR: dc.l $FFFFFE92
Then, private RAM is from C000 0000h to C000 07FFh.
I don't know how fast the ...

As said before (mask of destiny), the SH2 doesn't have any mechanism for cache coherency. When a CPU writes to memory, the other CPU has no mean of knowing the data he might have in its cache has to be invalidated.
I've thought about a mechanism :
each time a CPU write to memory, it puts the address ...

Stef wrote:... you have to use the cache and register as much you can.

Got it !

But man, ... I've never thought of developping software tile distortion .... I miss the Saturn VDP 1 (sigh...)

Anyway, coding a fill polygon function is quite of a challenge, and stimulating enough !!!

I've been thinking of what you told me for an hour, and I conclude that you're absolutely right : any mean that makes memory access or rate go faster will be welcome !

Great piece of advice, Fonz'