Search found 374 matches

by Jorge Nuno
Fri Mar 20, 2015 5:04 pm
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

Somewhat. There was something weird back then in the old times where we got asian games with megakeys, and I think asian MD systems too, but I don't remeber details :|
by Jorge Nuno
Fri Mar 20, 2015 4:52 pm
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

It's quite rare yes, I had one and yep it was PAL. No idea if it ever came in NTSC
by Jorge Nuno
Fri Mar 20, 2015 4:44 pm
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

VA6.8:

Image
by Jorge Nuno
Fri Mar 20, 2015 4:28 pm
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

Maybe they forgot about them? I mean the VA6.8 *still* has them and the markings of 5402:VA5 | 5433: VA6, except it says V6.8 on IC BD M5.. text
by Jorge Nuno
Fri Mar 20, 2015 3:51 pm
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

I challenge you (or anyone) to remove them on a USA/EU VA6 (the EOE/NOE wires)
by Jorge Nuno
Fri Mar 20, 2015 4:58 am
Forum: Hardware
Topic: Using the /TIME line for more than bank switching?
Replies: 13
Views: 19959

well, /Time only goes low for the access, around 300ns-ish. During the rest of the time it's high. To use to toggle a led you'll need a T-flipflop or a counter
by Jorge Nuno
Fri Mar 20, 2015 4:24 am
Forum: Hardware
Topic: Model 1 MD PCB hacks topic
Replies: 17
Views: 37350

l_oliveira, your board looks like a VA5 to me, even though it appears to have a 315-5433.. A VA6 has slightly different copper. I noticed in the CPU swap/mods that I did that /AS has a very high undershoot, the 220 Ohm resistor definitely helps smoothing that out. The PSRAM wires coming from the IO ...
by Jorge Nuno
Fri Nov 28, 2014 9:10 pm
Forum: Megadrive/Genesis
Topic: Sega Mega Drive/Genesis Collected Works
Replies: 18
Views: 16805

Interesting tidbit there where it lists a 96-tile plane size, but only in one dimension, perhaps Y
by Jorge Nuno
Tue Oct 28, 2014 5:07 pm
Forum: Hardware
Topic: Potentiometer Genesis Overclocking and ramifications.
Replies: 3
Views: 9450

I have seen a variable oscillator IC taking a variable resistor as a means to control the output frequency, so it could be that. However, I doubt it has the accuracy/stability given by a crystal oscillator (no way)
by Jorge Nuno
Sun Jun 29, 2014 7:25 pm
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

I forgot to say something. Only the counter would be running from 53M. The rest of the system would stay the same. No need to reinvent *everything* I know SDRAM and boy does it suck... Well, yes it's true that it's made for burst accesses and sucks for random accessing. The same can be said for all ...
by Jorge Nuno
Sun Jun 29, 2014 5:10 pm
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

SDRAM may not work at 53MHz? really? lol Also the comparison isn't fair as the MD isn't system synchronous with your FPGA logic. You had to put dual DFFs to prevent metastability on MD's lines, probably not on all, just on the read/write strobes (which is what triggers your internal state machines a...
by Jorge Nuno
Sun Jun 29, 2014 2:14 am
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

You're right you may have metastability on every edge, or not at all. But even so, they are in sync with the generated clock. It's prone to metastability (maybe) but it's synchronous The good thing is that the time is now based on MD's cycles and not on some unrelated clock
by Jorge Nuno
Sat Jun 28, 2014 11:06 pm
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

No no the multiplied clock is in sync with the Vclk of course, as that's where it came from
by Jorge Nuno
Sat Jun 28, 2014 9:59 pm
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

doesn't lock into 7MHz? Very odd

USB is 48M ok, but you can transfer it's data to the MD clock domain, instead of doing the contrary...
by Jorge Nuno
Sat Jun 28, 2014 12:43 am
Forum: Megadrive/Genesis
Topic: Sonic 1 Bus-Cycle Tracing Example
Replies: 19
Views: 12285

Easy: use VClk and feed it to a DCM multiplying it 7 times. This gets the FPGA a clock equal to the MD's system master clock, where everything is synchronous with.

A regular GPIO can handle it, but naturally, a GCK pin would be best here