Search found 256 matches
- Wed Nov 28, 2007 3:53 pm
- Forum: Mega/SegaCD
- Topic: 3d software rendering on megacd
- Replies: 20
- Views: 24661
- Wed Nov 28, 2007 3:45 pm
- Forum: Megadrive/Genesis
- Topic: Genesis Address Bus and Max RAM
- Replies: 35
- Views: 41180
Ohh? It was microcoded? Maybe that would explain the slow memory access (4cycles). That's strange they did that considering the 6800/6809 series wasn't microcoded. Anyway, I always considered it RISC in that it had a small library of instructions, had a large array of registers(compared to other CPU...
- Wed Nov 28, 2007 12:25 am
- Forum: Megadrive/Genesis
- Topic: Genesis Address Bus and Max RAM
- Replies: 35
- Views: 41180
The 68000 implements a 24-bit address bus, allowing it to address up to 16 MB of physical memory. Address storage and computation used 32 bits, however, with the high-order byte ignored due to the physical lack of pins. This allowed it to run software written for a flat 32-bit address space. By mod...
- Tue Nov 27, 2007 1:33 pm
- Forum: Mega/SegaCD
- Topic: 3d software rendering on megacd
- Replies: 20
- Views: 24661
- Tue Nov 27, 2007 1:29 pm
- Forum: Megadrive/Genesis
- Topic: Genesis Address Bus and Max RAM
- Replies: 35
- Views: 41180
- Sun Nov 25, 2007 11:21 pm
- Forum: Mega/SegaCD
- Topic: 3d software rendering on megacd
- Replies: 20
- Views: 24661
There is also the "write behind" or "write on top" or "write if !=0" feature, even more powerful than the 32x writes mode. I suppose they are still available in "software" writing... That's through the ASIC? For overlaying multiple object on the frame buffer? I figured it had some sort of overlayin...
- Fri Nov 23, 2007 11:34 pm
- Forum: Mega/SegaCD
- Topic: 3d software rendering on megacd
- Replies: 20
- Views: 24661
- Mon Oct 22, 2007 1:18 am
- Forum: Megadrive/Genesis
- Topic: Data compression
- Replies: 8
- Views: 10111
Nice comparison list Shiru. I converted pucrunch decompressor for another platform - it's a pretty decent compressor. I found quite a few LZSS compression schemes that use a circular buffer for mem->I/O (one that did I/O->I/O), avoiding the need to decompress large files before copying them to VRAM,...
- Thu Oct 11, 2007 1:26 pm
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
You're thinking about it wrong: there are two fields that make up each frame, an even and an odd field. We say the field rate is 60Hz because every 60th of a second, ONE of the two fields is displayed. Since a single field is not the entire frame, the field rate is not the frame rate. It takes two ...
- Thu Oct 11, 2007 3:21 am
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
It's not technically a legal NTSC signal (out of all the NTSC books and docs I have anyway), but almost all (99.9999999%) TVs support it. One of most popular DIY ZX Spectrum clones in Russia had so simplified video system so it had whole 320 lines instead of 312.5 per frame (so framerate was 48.82H...
- Thu Oct 11, 2007 2:24 am
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
The FRAME rate is 30Hz. The FIELD rate is 60Hz. Are you sure it's not the other way around? On an interlaced TV, if I play a video at both 30fps and 60fps, there is a difference, so 60fps can be seen. However, each field is being displayed only 30 times a second. (for example, even fields 30, odd f...
- Thu Oct 04, 2007 2:02 am
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
1/ how do you get that the pixel clock is the main clock (5.3693175 Mhz) divided by 8 in H40 ? The x10 factor in H32 mode seems fine as it is compatible with Charles Mc Donald's tests on the SMS. The main crystal is 53.69mhz. Divide by 10 to get 5.37mhz and divide by 8 to get 6.7125mhz. 2/ how do y...
- Tue Oct 02, 2007 9:15 pm
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
Did you miss the formula that I posted? 40 CELL mode uses a 6.7125Mhz dot clock and 32 CELL mode uses a 5.37mhz dot clock. That's what defines the "width" of a pixel for determining correct pixel aspect ratio and overscan area. 6.7125mhz/ 15735hz = 426 dot clock(pixel) length scanline / 1.186 (not d...
- Fri Sep 28, 2007 1:54 am
- Forum: Video Display Processor
- Topic: TV safe area
- Replies: 123
- Views: 96463
Before you find out the safe area of 40 cell mode, you need to figure out the dot clock for the horizontal line. 320 pixels isn't edge to edge. If I remember correctly, the mast clock for the NTSC Genesis is 53.7mhz. 40 cell mode should be 53.7mhz/8 = 6.7125mhz / 15735 hz = 426 pixels per scanline /...
- Fri Sep 14, 2007 1:06 am
- Forum: Mega/SegaCD
- Topic: How hard would be to code a NES/SMS emulator
- Replies: 31
- Views: 39284
I don't think you could use the square-wave channels to do the NES's pulse channels for two reasons: one, the NES has adjustable pulse width where the Genesis's chip does not, and two, the Genesis's chip, in the grand Yamaha tradition, uses logarithmic volume levels where everybody else, NES includ...