SpritesMind.Net

If you're interested, the oscilloscope I'm using is the Hantek DSO 2150. You can view the product on their website at http://www.hantek.com.cn/english/produce_list.asp?unid=63 It's a dual-channel Digitial Storage Oscilloscope, with completely PC-based controls. It has a pretty high sampling rate, an...

Just wanted to let you know, I was doing some much more thorough testing on this matter, and I got some results which contradicted tests I'd done previously. This was about 4 days ago now. I've been trying to get the time to go back and complete my testing, but I don't have a lot of free time right ...

Wow, I took awhile to write that. Your post wasn't there when I started. If you read further: .... It is clearly stated that acknowledge cycle only occur when the interrupt is not masked, and this seems logical to me, it is how most processors are working... Hmm. Well, it does seem to suggest that, ...

Ok, I've run a series of tests on the system. From what I can tell, I was correct in that the interrupt is acknowledged immediately after it is raised, even when it is masked. I started by measuring the IPL lines when interrupts were masked by the M68000, and found that the IPL lines were only asser...

I am not so sure about that: the 68000 manual explicitely say that if the priority of the pending interrupt is lower than the current processor priority (masked interrupt), the interrupt processing is postponed until it becomes greater. And the acknowledge cycle is described as one of the first ste...

I'm pretty sure the M68000 acknowledges all interrupts immediately. If the interrupt is masked, it's simply discarded, but the interrupt is acknowledged by the M68000 after the current bus cycle completes, whether the interrupt is taken or not.

I've been studying the schematics in some detail, trying to figure out how each possible interaction between the chipsets happen, and I'm realising how complex the banked memory access to the M68000 bus is from the Z80. The only controller which receives all the data lines from the Z80 is the 315-53...

Thanks for the diagram HardWareMan, I'll add it to my archive.

The Genesis/MD chipset decodes some of the 68K address lines to generate chip selects for RAM, the cartridge port, the side expansion port etc. Peripherals on the cartridge and expansion ports can ignore these chip selects and do their own decoding, but that's not very common. Aha! That makes sense...

Hi guys. I've noticed there a number of people here with a lot more knowledge about the nitty gritty hardware of the humble Mega Drive than myself, so I thought I'd pose a few questions which I've been unable to figure out the answers to on my own. I'm currently writing an emulator for the Mega Driv...

Does someone have a copy of that image HardWareMan posted? Link seems to be dead.