SpritesMind.Net

I'm wondering if anyone (Fonzie?) can elaborate on this forum about the cartridge connector signals which were discussed here:

http://segaxtreme.net/community/topic/14426-genesis-signal-analysis/

There are a couple of things I'm curious about:

- How to detect a read from the /TIME area. Since it ...

I had a similar problem on the Saturn with gcc, with a loop that was empty except for some inline assembly code. The compiler was optimizing the assembly code out of the loop or something like that.

If you add more 'stuff' to the loop so the compiler thinks it actually does something, it should ...

So the problem with Bonkers is that it expects the data in the FIFO will be written to VRAM before the VRAM read is processed?

If you always write to VRAM instantly (no FIFO emulation) does Bonkers work fine?

Are there any games that specifically test for a fifo full or partially full
condition ...

Any idea about the state of registers on a cold start ? Are they random for the most part like after a quick power off/on or are they cleared ?

From memory out of about 10 tests the values were mostly random, with more bits set than not (e.g. I never had it start with most of the registers ...

I've done some tests on the SMS with several different Z80s swapped in (NMOS and CMOS parts from different manufacturers) and on a GameGear which has a CMOS Z80, this is what I found when the Z80 /RESET pin is asserted:

- I, R, PC reset to zero.
- IM 0 selected and interrupts are disabled (like DI ...

I picked up one nice little nugget awhile back. It's a prototype for Virtua Racing. One day I'm planning to load my own code onto the cart and run tests on the SVP, to try and fully document the chip.

Whoa! Got any pictures or scans of the PCB?

Are there some missing elements from the current ...

Could somebody explain exactly what the goal with decapping is? What thing(s) are we trying to get?

1.) I know the YM2612 has an internal ROM with a sine wave. This has been read out with other FM chips using the test mode, and the YM2612 has a test mode too. Couldn't we use that or at least ...

How did you get there was two line buffers ? Wouldn't it be possible to get same effects with only one buffer (the same buffer is filled during HBLANK and pixels cleared as they are being displayed) ?

Yes, it could render during H-Blank but I think the timing would be extremely tight:

40-cell ...

This one I didn't know, i would have thought the VDP would be clearing the /INT line when detecting a Z80 Interrupt Ack cycle , thanks for clearing that up.

Going through my notes I noticed I measured that on a Sega C2 arcade board (they use INT for the 68000 V-Blank interrupt, weird). It should ...

...and JP machines have no shielding and VA5 boards do not show TMSS in JP setting but do in EN setting.

I'd say you just solved it!

Will dig up the numbers as quick as I can.

Hey TmEE, I have a MegaDrive that works regardless of writing SEGA or not, even though it is Ver. 1 and the A14000 register is there and read/writable.

It's a real unit (HAA-2605 or whatever) though I was always suspicious as it has no internal shielding at all and no cartridge 'lock' mechanism ...

VDP core does clear the interrupt on INTAK, but it's not very accurate either. I'm trying to complete my new VDP core, which is why I'm going over everything.

In mode 5 the interrupt is cleared automatically when the 68000 issues an interrupt acknowledge cycle.

In mode 4 this does not happen and ...

Any ideas what might be causing this?

When you are using a cross compiler the two 'extra' things you usually have to do is link in the object "crt0.o" along with your own objects, and specify a linker script which states where the target system ROM and RAM areas are at.

If you look through the ...

These 2 games, Kawasaki Super Bike Challenge & F1 from Domark both use the same engine which makes use of the 2-cell vertical scrolling VDP feature (each 16-pixels column can have a specific vscroll offset from VSRAM).

Just curious, are you testing this with Genesis Plus? I did a lot of research ...

You should use RAM locations above $ffff8000 for your variables. This ensures that the addresses will be 16 bits if the appropriate assembler option has been given. In Snasm68K, the option -ow+ enables this.

For some reason I can never get SNASM to respect the options passed to it, but if you ...