Search found 830 matches

by Eke
Sat Mar 26, 2016 1:47 pm
Forum: Hardware
Topic: Reading and writing bytes. Addresses, data, LDSW and UDSW...
Replies: 17
Views: 5218

Re: Reading and writing bytes. Addresses, data, LDSW and UDSW...

as I wrote here[/url], I have observed (using a logic analyzer) just the opposite: #LDSW is lowered for even addresses , and #UDSW is lowered for odd addresses. Seems like you are confused, from what you wrote in the post you linked, you actually observed the opposite i.e UDSW being lowered for eve...
by Eke
Sat Jan 30, 2016 2:50 pm
Forum: Megadrive/Genesis
Topic: 68K Refresh Delays
Replies: 5
Views: 2105

Re: 68K Refresh Delays

This will cause a delay of 3 VCLKs on the access the 68K was attempting to perform. From my own tests (see this thread http://gendev.spritesmind.net/forum/viewtopic.php?t=1411), the delay can vary between 1 and 3 VCLK (additional delay before DTACK is asserted) depending on when /AS was asserted re...
by Eke
Wed Dec 23, 2015 11:40 pm
Forum: Megadrive/Genesis
Topic: Question on SRAM
Replies: 14
Views: 4364

Re: Question on SRAM

A few questions about the random syntax: The ?: In the scan, it mentions volatile and non-volatile RAM. Is battery backed SRAM considered non-volatile because it's backed up by a battery, or volatile because if the battery isn't present (or dead), the data is lost on power off? Maybe both depending...
by Eke
Wed Dec 23, 2015 4:40 pm
Forum: Megadrive/Genesis
Topic: Question on SRAM
Replies: 14
Views: 4364

Re: Queston on SRAM

Okay, so the hardware and emulators don't care about the header as far as SRAM is concerned? Am I understanding that right? For real hardware, yes, unless you are using a flashcart where SRAM access is only enabled by the embedded OS after looking at the loaded ROM header (i don't think any flashca...
by Eke
Wed Dec 23, 2015 9:11 am
Forum: Megadrive/Genesis
Topic: Question on SRAM
Replies: 14
Views: 4364

Re: Queston on SRAM

My question is: Does the size of the SRAM file that Fusion creates (or I suppose every emulator creates) just depend on how much you utilize the SRAM (like, if I only write 6 bytes, the file will be 6 bytes), or does the file get padded based on the size in the header? Or, does the size in the head...
by Eke
Wed Dec 16, 2015 1:17 pm
Forum: Sound
Topic: New Documentation: An authoritative reference on the YM2612
Replies: 859
Views: 344880

Re: New Documentation: An authoritative reference on the YM2612

so I'm not surprised some people like Jarek doesn't want to see their's code and research research results used by someone else for making money. I am not sure if he is aware that his code is being used commercially in Genesis Plus GX ripoffs that have a lot of exposure and likely make huge profits...
by Eke
Wed Nov 25, 2015 9:29 pm
Forum: Mega/SegaCD
Topic: Sega CD (US) BIOS Disassembly @ GitHub
Replies: 7
Views: 3161

Re: Sega CD (US) BIOS Disassembly @ GitHub

CD-DA audio data is still sent to CDC (LC8951x chip which is normally used to decode CD-ROM data) and can just as well be read in buffered raw form by sub CPU. AFAIK, that's how internal CD player and Flux VU meters work. I didn't knew about Lunar animations though.
by Eke
Mon Nov 02, 2015 11:52 am
Forum: Megadrive/Genesis
Topic: M68K Interrupt Processing
Replies: 7
Views: 2441

Re: M68K Interrupt Processing

Some quick testing suggests that no emulators get the latency quite right, though a couple (Fusion and Genesis Plus GX) are good enough for Sesame Street and Genesis Plus GX is quite close (seems to be emulating roughly 4 cycles of delay, rather than a 1 instruction latency). It should be exactly o...
by Eke
Fri Oct 30, 2015 4:48 pm
Forum: Megadrive/Genesis
Topic: Noob questions: DEFINITIVE info about Z80 BUSREQ, RESET?
Replies: 20
Views: 4250

Re: Noob questions: DEFINITIVE info about Z80 BUSREQ, RESET?

Stef's instructions make it sound like I do need to care about when the Z80 regains the bus. Or am I misunderstanding this? I don't know, maybe it's because when you need to reset z80, /RESET must be asserted long enough while Z80 has control of the bus to be effective. I'm not sure if that's reall...
by Eke
Tue Oct 27, 2015 8:09 am
Forum: Megadrive/Genesis
Topic: Noob questions: DEFINITIVE info about Z80 BUSREQ, RESET?
Replies: 20
Views: 4250

Re: Noob questions: DEFINITIVE info about Z80 BUSREQ, RESET?

1) Z80 /BUSREQ is not directly connected to 68k CPU, it is handled by a dedicated chip which handles most address decoding and will assert z80 /BUSREQ if access is done to proper 68k address range and proper 68k data line is asserted. 2) It always get the bus back, there is nothing you can do to for...
by Eke
Tue Oct 20, 2015 9:57 pm
Forum: Video Display Processor
Topic: MD VDP color levels
Replies: 10
Views: 4632

Re: MD VDP color levels

These steps seem to match voltages that were measured here: http://gendev.spritesmind.net/forum/viewtopic.php?f=22&t=519&start=82 There was also some discussion here : http://gendev.spritesmind.net/forum/viewtopic.php?f=22&t=1389 Shadow Highli Normal -------- -------- --------- (0) 0.0 0.0 (0) (1) 0...
by Eke
Mon Oct 19, 2015 9:08 pm
Forum: Hardware
Topic: Interfacing CMOS 3.3V logic
Replies: 15
Views: 4036

Re: Interfacing CMOS 3.3V logic

Thanks for taking the time putting up this very detailled answer, db-electronic. So, to summarize, using resistor series as voltage divider creates a load on the cartridge port which results in a slight increase of the current going through not only cartridge but also console board parts, thus incre...
by Eke
Fri Oct 16, 2015 10:40 am
Forum: Sound
Topic: New Documentation: An authoritative reference on the YM2612
Replies: 859
Views: 344880

Re: New Documentation: An authoritative reference on the YM2612

Nemesis wrote:I was actually starting up my own "at home" decapping lab, and I've got the fuming nitric acid in the garage which can attest to it
:shock:
by Eke
Fri Oct 16, 2015 10:34 am
Forum: Hardware
Topic: Interfacing CMOS 3.3V logic
Replies: 15
Views: 4036

Re: Interfacing CMOS 3.3V logic

Series resistors in line with 3.3V flash parts (such as the Krikzz product you linked) is BAD engineering. The maximum Vin those parts can handle is 4V, after that, all excess votlage is converted to latch-up current by the input clamping diodes - and also means that your console is sourcing alot o...
by Eke
Tue Oct 13, 2015 10:51 am
Forum: Video Display Processor
Topic: VDP Debug Register - $C0001C
Replies: 17
Views: 7773

Re: VDP Debug Register - $C0001C

Sprite data on the right. I still don't think this is the sprite fetch, because that should be happening much faster than this to be efficient (simply not enough hblank time to grab 320px worth of sprite data) It was actually confirmed that all the sprite pattern fetching is done during HBLANK (whi...