Search found 830 matches

by Eke
Tue Aug 22, 2017 8:17 am
Forum: Megadrive/Genesis
Topic: Interlace mode (LSMx=3)
Replies: 20
Views: 2942

Re: Interlace mode (LSMx=3)

What I think you are missing, as far as I can tell: - for vscroll, value read from VSRAM must be shifted right by one (VSRAM width is 11-bit but bit0 is ignored in interlaced mode 2) before being added to vcounter value (9-bit) - for sprites, when preparing the sprites list (i.e looking which sprit...
by Eke
Mon Aug 21, 2017 11:13 pm
Forum: Megadrive/Genesis
Topic: Interlace mode (LSMx=3)
Replies: 20
Views: 2942

Re: Interlace mode (LSMx=3)

What I think you are missing, as far as I can tell: - for vscroll, value read from VSRAM must be shifted right by one (VSRAM width is 11-bit but bit0 is ignored in interlaced mode 2) before being added to vcounter value (9-bit) - for sprites, when preparing the sprites list (i.e looking which sprite...
by Eke
Tue Jul 11, 2017 10:18 pm
Forum: Controls
Topic: Mega Mouse Usage
Replies: 23
Views: 5991

Re: Mega Mouse Usage

Yes, that's pretty much it :wink:
by Eke
Tue Jul 11, 2017 10:10 pm
Forum: Video Display Processor
Topic: Is DMA Fill buggy?
Replies: 11
Views: 1795

Re: Is DMA Fill buggy?

The 'issue' is that VRAM byte writes (used by VRAM fill and copy DMA) actually occur to VRAM address ^ 1 so you can get unexpected results depending on start address, DMA length and increment alignments. In your case, when VRAM address reaches F000H, last write occurs at F001H instead of F000H. I th...
by Eke
Mon Jul 10, 2017 12:10 pm
Forum: Controls
Topic: Mega Mouse Usage
Replies: 23
Views: 5991

Re: Mega Mouse Usage

I can't really tell what you're doing from the values, but 3-line handshake is simple: start with unselected (0x60), then toggle back and forth between the two selected states (0x20 and 0x00) to get nibbles (0x20 first). That's all there is to it. When you're done, deselect the mouse again (0x60). ...
by Eke
Sun Jul 09, 2017 11:08 pm
Forum: Controls
Topic: Mega Mouse Usage
Replies: 23
Views: 5991

Re: Mega Mouse Usage

I'm guessing the oo means it timed out? Yes. It seems to indicate the mouse does not respond to handshake request when TH is low unless it was properly reseted (60h followed by 20h or possibly 00h). If you don't mind, I added a few write sequences for completeness in this test ROM. This should be t...
by Eke
Sun Jul 09, 2017 8:06 pm
Forum: Controls
Topic: Mega Mouse Usage
Replies: 23
Views: 5991

Re: Mega Mouse Usage

Thanks for this quick test. And yes, it's just a one shot write sequence , it's not supposed to update itself. Results are interesting but definitively not what is expected from games (and quite different from what you get in emulators). I suspect the reason is I'm switching TR output too fast for t...
by Eke
Sun Jul 09, 2017 12:36 pm
Forum: Controls
Topic: Mega Mouse Usage
Replies: 23
Views: 5991

Re: Mega Mouse Usage

Sorry to bump this thread but anyone here having a Sega/Mega Mouse could test this ROM on hardware (with mouse controller plugged in port 2) and report output values ? I'm trying to figure the acknowledge latency of the mouse protocol, as it seems to be (involuntarily ?) needed by a few game routines.
by Eke
Fri Jun 23, 2017 1:10 pm
Forum: Hardware
Topic: HDD (or flash) instead of a CD, questions...
Replies: 140
Views: 36374

Re: HDD (or flash) instead of a CD, questions...

It's not exactly the same (it push Q first, not P) but i think I got it know, based on previous post Beware that this last diagram is about different signals (SQCK/SQDT)- also present on CXD2500 chip (the latter is just named SQSO) - which are dedicated to Q-channel (with CRC verification): that wa...
by Eke
Tue Jun 20, 2017 12:08 pm
Forum: Mega/SegaCD
Topic: Subcodes only for CD+G ?
Replies: 8
Views: 2247

Re: Subcodes only for CD+G ?

If the SBSO line is flat, it won't bug the game ? It shouldn't affect software since, from my testing in emulator, neither games or BIOS care if the subcode interrupt never occurs But it's possible it could lock the ASIC and thus the whole Mega CD hardware, depending how it was designed. Quite unli...
by Eke
Mon Jun 19, 2017 9:17 pm
Forum: Mega/SegaCD
Topic: Subcodes only for CD+G ?
Replies: 8
Views: 2247

Re: Subcodes only for CD+G ?

D/M status, TOC and current Track infos are all retrieved/computed by dedicated 4-bit microprocessor using subcode Q data output by CD DSP on SUBQ pin (controlled by serial clock on SQCK pin). D/M status bit is found in Q subchannel control field while TOC and current Track infos are found in q-data...
by Eke
Mon Jun 19, 2017 7:43 pm
Forum: Hardware
Topic: HDD (or flash) instead of a CD, questions...
Replies: 140
Views: 36374

Re: HDD (or flash) instead of a CD, questions...

I wonder why they didn't do the same for the data : SDATA is sent what ever is D/M to the LC8951x Because that's the only way software can access sector data from the CD. This might not seem really useful for CD audio data but internal CD player for example uses it to display VU meter while playing...
by Eke
Tue May 02, 2017 12:50 pm
Forum: Video Display Processor
Topic: Titan's Mega Drive tech docs including Debug Register
Replies: 36
Views: 8173

Re: Titan's Mega Drive tech docs including Debug Register

Are you preserving the list of sprites determined to be on the current line when you do the re-fetch (sounds like maybe that's what you are doing, but it's not 100% clear)? Correct rendering relies on sprites showing on a line based on the old Y value even though the new Y value would cause them to...
by Eke
Sun Apr 30, 2017 7:55 am
Forum: Video Display Processor
Topic: Titan's Mega Drive tech docs including Debug Register
Replies: 36
Views: 8173

Re: Titan's Mega Drive tech docs including Debug Register

No idea what causes the vertical stripes in the 3rd pic, though, incorrectly emulated illegal plane modes maybe? BlastEm had these too and I believe fixing that is what got rid of them. Yes,that was it. Genesis Plus correctly emulated all illegal plane sizes except two ("10 10" and "10 11" in above...
by Eke
Sat Apr 29, 2017 12:07 pm
Forum: Video Display Processor
Topic: Titan's Mega Drive tech docs including Debug Register
Replies: 36
Views: 8173

Re: Titan's Mega Drive tech docs including Debug Register

Kabuto wrote: This looks like you still need to invert address bit 0 after converting the target address for 128k mode emulation.
Off course you are right, totally forgot about that. The textured cubes scene also look much less broken now...
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