Search found 230 matches

by mickagame
Thu Feb 12, 2009 9:30 am
Forum: Video Display Processor
Topic: HBlank Timings
Replies: 163
Views: 44679

So, If i understand : LINE N LINE N + 1 |----------------------------------------------|-------------------- <HBS>---------<HBE>----------------------------<HBS> | <H-INT> | <LRE> HBS -> HBLANK start HBE -> HBLANK end H-INT -> H-INT Trigger LRE -> Line rendering Do delay between Hint and Hblank star...
by mickagame
Wed Feb 11, 2009 11:23 pm
Forum: Video Display Processor
Topic: HBlank Timings
Replies: 163
Views: 44679

Here is an extract of genesis plus source code : /* active display */ if (line <= vdp_height) { /* H Interrupt */ if(--h_counter < 0) { h_counter = reg[10]; hint_pending = 1; if (reg[0] & 0x10) irq_status = (irq_status & 0xff) | 0x14; /* adjust timings to take further decrement in account (see below...
by mickagame
Sat Jun 14, 2008 6:50 am
Forum: Video Display Processor
Topic: HBlank Timings
Replies: 163
Views: 44679

I'm using Stephane Dallongeville C68k core rewritten in C++.
My aim is to do a genesis core which can be ported in any platform.
This core is 70% completed now.
by mickagame
Wed Jun 11, 2008 4:16 pm
Forum: Video Display Processor
Topic: HBlank Timings
Replies: 163
Views: 44679

Ok I understand.
My main loop emulation is very special, and if I want i can render the line some cycle after HBlank start in any case.
How many cycles does the vdp takes in order to fetch informations?

Thank you eke for all informations you give me ;-)
by mickagame
Tue Jun 10, 2008 8:51 pm
Forum: Video Display Processor
Topic: HBlank Timings
Replies: 163
Views: 44679

HBlank Timings

Hello, My name is Mickaël and I'm french fan of Sega Genesis. In my free time I develop a genesis emulator written in C++. I have big problem to understand how Horizontal interrupt and Hblank period are ordained. When i'm watching source code of gens, written by the fantastic Stef, H-Int is generate...