Search found 15 matches

by ijor
Mon Jun 10, 2019 2:59 am
Forum: Megadrive/Genesis
Topic: 68K cycle timing test ROM?
Replies: 10
Views: 469

Re: 68K cycle timing test ROM?

Question though: what is the purpose of IRD? http://pasti.fxatari.com/68kdocs/68kPrefetch.html 1) Load IRC from external memory. <reset only> 2) Transfer IRC to IR. 3) Reload IRC from external memory. 4) Transfer IR to IRD. According to this, IRD will always be equal to IR. Is there any reason for ...
by ijor
Wed Jun 05, 2019 9:04 pm
Forum: Megadrive/Genesis
Topic: I'm officially building a microcode-level 68000 core
Replies: 41
Views: 3126

Re: I'm officially building a microcode-level 68000 core

Nemesis wrote:
Tue May 28, 2019 12:18 am
Not surprising, at it appears "Nick Tredennick" was the lead designer of the 68000 for Motorola
Just for the record, Nick Tredennick wasn't exactly the lead designer. Tredennick designed the microcode and parts of the logic. The main architect and project manager was Tom Gunter.
by ijor
Wed Jun 05, 2019 8:52 pm
Forum: Megadrive/Genesis
Topic: 68K cycle timing test ROM?
Replies: 10
Views: 469

Re: 68K cycle timing test ROM?

Does there exist a test ROM that validates the cycle timings of 68K instructions? ... I would prefer a Genesis test ROM, but if there's one for no real specific CPU architecture (eg I won't have to emulate an entire Amiga or Neo Geo), that would also be great. I can't comment about the Genesis, but...
by ijor
Thu May 23, 2019 11:57 pm
Forum: Megadrive/Genesis
Topic: I'm officially building a microcode-level 68000 core
Replies: 41
Views: 3126

Re: I'm officially building a microcode-level 68000 core

There are two kinds of annotations used in the top right of the nanoword content field in Appendix F. I've brought this data into the csv, but I don't know what it represents at this stage. The " Access Label " field is supposed to be a combination of three different fields, the access class, mode ...
by ijor
Mon May 20, 2019 4:07 am
Forum: Megadrive/Genesis
Topic: I'm officially building a microcode-level 68000 core
Replies: 41
Views: 3126

Re: I'm officially building a microcode-level 68000 core

A few comments: Is everything in the micro/nanocode? Not at all, by far. There are roughly 200 control signals to the EU, the registers, etc. There are more or less 70 signals coming from the micro or nanocode (68 from nano plus the two bus access type from micro). the 70->200 expansion is controlle...
by ijor
Tue May 14, 2019 4:50 am
Forum: Megadrive/Genesis
Topic: I'm officially building a microcode-level 68000 core
Replies: 41
Views: 3126

Re: I'm officially building a microcode-level 68000 core

Hi Nemesis, ... I've decided I'm going to focus on a microcode-level 68000 emulation core, and I'm going to continue with it until it's a reality. I think this is just a so great idea and I definitely look forward for your results :) But see my comments below. ijor's verilog implementation of the 68...
by ijor
Tue Jan 08, 2019 4:53 pm
Forum: Megadrive/Genesis
Topic: 68K inner workings
Replies: 3
Views: 945

Re: 68K inner workings

The physical location of the various registers is also a very nice bit of work that I don't think there has been any public info on previously. The presence of result registers for the ALU and AU also explains how the 68K is able to safely read results of a previous operation in the same micro-cycl...
by ijor
Mon Jan 07, 2019 12:26 pm
Forum: Megadrive/Genesis
Topic: 68K inner workings
Replies: 3
Views: 945

Re: 68K inner workings

Hi, I just wanted to share some of my notes I made a while back. This is based on Galibert's schematic, so in these notes the chip is assumed to be oriented such that the A13 pin is on the upper left. A lot of this is probably well known already, but I thought it'd be nice to have it all in one pla...
by ijor
Tue Dec 11, 2018 1:21 pm
Forum: Megadrive/Genesis
Topic: 68k patents
Replies: 5
Views: 1801

Re: 68k patents

Ah, so you have information from the actual chip instead of from patents. Fair enough, I eagerly await the corrections :D Hi, sorry, I was too busy. Please bear with me a few days more. In the meantime, see my signature. If you are more or less familiar with simulating Verilog code, you could simul...
by ijor
Wed Dec 05, 2018 2:41 am
Forum: Megadrive/Genesis
Topic: 68k patents
Replies: 5
Views: 1801

Re: 68k patents

I'm not exactly sure what you mean by "the address error triggers". If you mean before exception logic microcode starts, then yes, of course, there is no other way that it could be done. This is also true for bus error. At least according to the patent describing bus error, this is not true: it des...
by ijor
Wed Dec 05, 2018 2:35 am
Forum: Exodus
Topic: Genesis 68K bus timing
Replies: 6
Views: 1357

Re: Genesis 68K bus timing

Mask of Destiny wrote:
Sat Dec 01, 2018 4:13 am
Here's a small collection of captures of various types of bus interactions. They are in Open Logic Sniffer Project format. Explanations below:
Thanks a lot!
by ijor
Sat Dec 01, 2018 12:55 am
Forum: Exodus
Topic: Genesis 68K bus timing
Replies: 6
Views: 1357

Re: Genesis 68K bus timing

Mask of Destiny wrote:
Fri Nov 30, 2018 6:33 pm
EDIT: I can dig up the actual captures if they would be useful to you
Thanks a lot. Yes, I'd love to see the captures, if it is not too much trouble.
by ijor
Fri Nov 30, 2018 2:51 am
Forum: Megadrive/Genesis
Topic: 68k patents
Replies: 5
Views: 1801

Re: 68k patents

I have been taking a dive in the 68k patents recently, trying to find if there was a version with a more recent version of the microcode. I'm no aware about any patents with the microcode updated with DBcc and the actual exception processing. All the patents seem to be before prototyping. But the a...
by ijor
Fri Nov 30, 2018 2:31 am
Forum: Exodus
Topic: Genesis 68K bus timing
Replies: 6
Views: 1357

Re: Genesis 68K bus timing

Browsing your code I looked a bit at your 68K implementation. Here I am providing some answers to some of the comments at your code: Note that hardware tests have shown that all registers are not initialized to 0 when the processor is first powered on. In fact, it would appear that most likely all t...
by ijor
Fri Nov 30, 2018 2:26 am
Forum: Exodus
Topic: Genesis 68K bus timing
Replies: 6
Views: 1357

Genesis 68K bus timing

I have some questions about Genesis if you don't mind. Knowing the accuracy of the Exodus emulator, you might have the knowledge. I also might provide some answers myself (see below) I specialize in the 68K CPU. I am collaborating with other people in improving a Genesis FPGA core. I'm afraid I'm no...