SpritesMind.Net

Having a sub forum for YM2612 dedicated topics is a good idea but seems like a hard task to initialize and maintain. Each subthread should start with a post summarizing the current 'verified' informations we have on that part of the chip and kept updated according to the following thread discussion....

Nice progress! never thought emu developers would try to fix their emulators so quickly, after it took a while after overdrive 1. To be fair, first demo only required a few adjustment to FIFO timings emulation, which was done quickly after the demo release to get stable 512k screen, and the limitat...

I argue with eke about: is it understandable or not. If by "I understand" he meant that he just realized what happened - then I think he used bad word. Then I've described situation in case if he missed twitter message & replies. That's all. I am not a native english speaker either but for me, sayi...

Thanks a lot indeed. I only had a quick look at it but I noted the following topics holding new infos to me, mostly VDP processing edge case tricks: - V28/V30 bit trick: it was my initial assumption that this bit could be used to increase the display size by switching it in appropriated line interva...

What?! Do you understand what you just said? You understand how someone can close forum because of drama? I thought you can always set read/only, disable pm, or ban in latest case if you don't see other solution. But closing forum for everyone? I won't accept it for any cause. It was closed for a f...

I personally thought the forum was hacked first, so the important thing to me is that there was no harm in the end. Closing down the forum for one week might be a little overreacting but I can understand Kaneda's stressing out and being "pissed off" when he has to handle childish drama between membe...

:shock: I can't even imagine how this was coded (and debugged), this was surely crazy head scratching and endless experimenting to achieve this. If, as i guess, it relies on very precisely timed VDP writes (FIFO and registers) interleaved with the rendering processing, this is going to be a nightmar...

Your intuition seems to be correct. There's a unit at the beginning of the PG which takes the 3 bits of BLOCK, plus two bits from an "unknown source" (I'll call them "pink bits" because I happened to color their wires pink on my annotated chip image), delays them by 1 or 2 cycles, sends the BLOCK b...

26KHz is the effective max for the YM DAC register from my tests, going higher makes the sound worse. I haven't done any actual investigation but there cannot be anything else happening than missed writes. I played some real music and all the higher freq stuff was getting garbled when you went beyo...

I never did a full reverse engineering of it, but here's what I have (from private messages to jotego): Thanks, it still helps confirming a few stuff [*] 7-bit linear prescaler. The test bit 0x21:1 goes into what looks like the carry-in or something similar; it could go into the reset, I can't quit...

I would go with the LFO, but honestly I haven't found it yet. Hi, Recently doing some correction in YM2612 core, I was wondering if you ever figured out the LFO and how it works exactly, especially regarding Phase Modulation. Some questions I have (based on current implementations): 1) how is LFO P...

W If you attempt to, what will happen is that the first column (remember: two tiles) for plane A will reuse the same tiles as the last column of window, because it didn't fetch new tiles yet. When this is not the case though the first visible tile of plane A falls under the same column as the last ...

Interesting ... so it can do two 8-bit writes to VRAM in the same amount of time it takes to do one 16-bit write to VSRAM and CRAM? No, I didn't implied that. It takes the same amount of time to do one VRAM access, one CRAM access or one VSRAM access. Data written to FIFO (16-bit) holds 2 x VRAM by...

Hi, I hope this can help you a little bit... So my understanding is that VRAM has a 16-bit data bus. VDP bus is 16-bit but VRAM itself is only 8-bit. You can have a look at schematics, those are generally 2xVRAM chips with 4-bit DATA bus connected externally to VDP When you go to write to the VDP da...

Can anyone add this "feature" to existing emulators / players plugins? Usually I listen music via Maxim's plugin. I am emulating the 9-bit DAC (although not 100% accurately for all algorithms since bits 0-4 masking is done after the operator 14-bit outputs have been eventually summed while it shoul...